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FIBOCOM FG621-LA Series Hardware Guide
Page 16 of 57
Pin#
Pin Name
I/O
Level
Description
52
SD_ DETECT
DI
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
SD card hot-swap
detection signal
56
RTS
DO
V
OL
max=0.45V
V
OH
min=1.35V
Request to send data,
Reserved
57
CTS
DI
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
Clear to send, Reserved
58
RXD
DI
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
Module Receive data,
Reserved
59
DCD
DO
V
OL
max=0.45V
V
OH
min=1.35V
Module output carrier
detection, Reserved
60
TXD
DO
V
OL
max=0.45V
V
OH
min=1.35V
Module Transmit data,
Reserved
61
RI
DO
V
OL
max=0.45V
V
OH
min=1.35V
Module output ring
indicator
62
DTR
DI
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
Ready, sleep mode
control, Reserved
65
PCM_SYNC
DIO
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
PCM synchronization
signal
66
PCM_IN
DI
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
PCM input signal
67
PCM_CLK
DO
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
PCM clock signal
68
PCM_OUT
DO
V
OL
max=0.45V
V
OH
min=1.35V
PCM output signal
71
RFFE_CLK
DO
V
OL
max=0.45V
V
OH
min=1.35V
RF MIPI clock signal,
Reserved
73
RFFE_DATA
DIO
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
RF MIPI data signal,
Reserved