Configuration
CPC1600
C P C 1 6 0 0 U s e r M a n u a l
52
© 2 0 0 8 F a s t w e l V e r . 0 0 1 E
I/O Address
Read Target
Write Target
Internal Unit
B2h–B3h
Power Management
Power Management
Power Management
B4h–B5h
Interrupt Controller
Interrupt Controller
Interrupt
B8h–B9h
Interrupt Controller
Interrupt Controller
Interrupt
BCh–BDh
Interrupt Controller
Interrupt Controller
Interrupt
C0h–D1h
DMA Controller
DMA Controller
DMA
D2h–DDh
RESERVED
DMA Controller
DMA
DEh–DFh
DMA Controller
DMA Controller
DMA
F0h
PCI and Master Abort1
FERR#/IGNNE# / Interrupt Controller
Processor I/F
170h–177h
IDE Controller, SATA Controller, or PCI
IDE Controller, SATA Controller, or PCI
Forwarded to IDE or SATA
1F0h–1F7h
IDE Controller, SATA Controller, or PCI 2
IDE Controller, SATA Controller, or PCI
Forwarded to IDE or SATA
376h
IDE Controller, SATA Controller, or PCI
IDE Controller, SATA Controller, or PCI
Forwarded to IDE or SATA
3F6h
IDE Controller, SATA Controller, or PCI 2
IDE Controller, SATA Controller, or PCI
Forwarded IDE or SATA
4D0h–4D1h Interrupt
Controller
Interrupt Controller
Interrupt
CF9h
Reset Generator
Reset Generator
Processor I/F
Notes:
1. A read to this address will subtractively go to PCI, where it will master abort.
2. Only if IDE I/O space is enabled (D31:F1:40 bit 15) and the IDE controller is in legacy mode. Otherwise, the target is PCI.