CPB902
C P B 9 0 2 U s e r M a n u a l
4
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List of Figures
Figure 1.1:
CPB902 Module Appearance..............................................................................................................10
Figure 3.1:
External Devices Connection ..............................................................................................................17
Figure 3.2:
Cables 3 and 4 (Fig. 3.1) Connection for Console Operation ................................................................19
Figure 4.1:
CPB902 Block Diagram ......................................................................................................................21
Figure 4.2:
Top Side: Connectors and Main Components Layout...........................................................................23
Figure 4.3:
Bottom Side: Connectors and Main Components Layout......................................................................23
Figure 4.4:
Interrupt Source Multiplexing Diagram .................................................................................................32
Figure 4.5:
DMA Request Channels Multiplexing Diagram.....................................................................................34
Figure 4.6:
Connection of 16-bit DSTN Panel........................................................................................................42
Figure 4.7:
Connection of 24-bit DSTN Panel........................................................................................................42
Figure 4.8:
Connection of a TFT Panel with 1 Pixel per FPSCLK Period ................................................................43
Figure 4.9:
Connection of a TFT Panel with 2 Pixels per FPSCLK Period...............................................................43
Figure 4.10:
LVDS Interface for TFT LCD Panel......................................................................................................44
Figure 4.11:
PanelLink Interface for TFT LCD Panel ...............................................................................................44
Figure 4.12:
PanelLink Interface for DSTN LCD Panel ............................................................................................45
Figure 4.13:
Sharp LQ104V1DG51 TFT Panel Connection and Setup .....................................................................46
Figure 4.14:
CV04 Unit Appearance .......................................................................................................................47
Figure 4.15:
CVM04 Connections Diagram .............................................................................................................48
Figure 4.16:
LCD Screen Image Orientation Control................................................................................................49
Figure 4.17:
CVM01 Expansion Module..................................................................................................................50
Figure 4.18:
IDC10 Pins Numbering .......................................................................................................................52
Figure 4.19:
COM3 – COM6 Ports Jumpers............................................................................................................53
Figure 4.20:
Point-to-Point Connection of Two Modules in RS-422 Mode.................................................................54
Figure 4.21:
Connection of Several Devices in RS-485 Mode ..................................................................................54
Figure 4.22:
COM3-COM6 Ports: Simplified Interface Circuit Diagram .....................................................................55
Figure 4.23:
POWERTIP PC1604-A Alphanumeric LCD Connection Diagram..........................................................58
Figure 4.24:
POWERTIP PG12864-A Graphics LCD Connection Diagram...............................................................58
Figure 4.25:
J18 Pinpad Connection Circuit Diagram...............................................................................................59
Figure 4.26:
Discrete I/O Channel Block Diagram ...................................................................................................61
Figure 4.27:
Discrete I/O Unit: Ports Binding Diagram .............................................................................................61
Figure 4.28:
Reset Source Selection and Optoisolated Input Circuit Diagram...........................................................62
Figure 4.29:
J19 Circuit Diagram ............................................................................................................................63
Figure 4.30:
PC/104 P4 Contacts Layout ................................................................................................................64
Figure 4.31:
CPB902 Top Side: Overall and Mounting Dimensions..........................................................................68
Figure 4.32:
CPB902 Bottom Side: Overall and Mounting Dimensions.....................................................................68
Figure 5.1:
Main Menu Screen Image ...................................................................................................................71
Figure 5.2:
Basic CMOS Configuration Screen Image ...........................................................................................72
Figure 5.3:
Features Configuration Menu Screen ..................................................................................................74
Figure 5.4:
Custom Configuration Menu Screen ....................................................................................................75
Figure 5.5:
Plug-n-Play Configuration Menu Screen Image....................................................................................78
Figure 5.6:
Shadow Configuration Menu Screen Image.........................................................................................79
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