NexLog Recorder User Manual v2.2.0
129
connector pin assignments. For detailed specifications, refer to PCI-6503 on the
National Instruments web site (
Figure 58
—GPIO Board Pin Assignments (NI PCI-6503)
PC7
1
2
GND
PC6
3
4
GND
PC5
5
6
GND
PC4
7
8
GND
PC3
9
10
GND
PC2
11
12
GND
PC1
13
14
GND
PC0
15
16
GND
PB7
17
18
GND
PB6
19
20
GND
PB5
21
22
GND
PB4
23
24
GND
PB3
25
26
GND
PB2
27
28
GND
PB1
29
30
GND
PB0
31
32
GND
PA7
33
34
GND
PA6
35
36
GND
PA5
37
38
GND
PA4
39
40
GND
PA3
41
42
GND
PA2
43
44
GND
PA1
45
46
GND
PA0
47
48
GND
+5V
49
50
GND
Eventide has adopted static port assignments on the PCI-6503, as follows:
Input channels 0 – 7: Port A (PA0–PA7); pin pairs 47+48 to 33+34
Input channels 8 – 11: Port C upper nibble (PC4–PC7); pin pairs 7+8 to 1+2
Output channels 0 – 7: Port B (PB0–PB7); pin pairs 31+32 to 17+18
Output channels 8 – 11: Port C lower nibble (PC0–PC3); pin pairs 7+8 to 1+2
