Eurotech EmbeddedDNA An0031 Manual Download Page 1 | Manualshive

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Embedded

DNA

®

PC/104 CPU Module

CPU-1232; TFT Digital Interface

Rev. 1.0

Sep. 2003

COPYRIGHT 1994-2003 Eurotech S.p.A. All Rights Reserved.

An0031

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Summary of Contents for EmbeddedDNA An0031

Page 1: ...EmbeddedDNA PC 104 CPU Module CPU 1232 TFT Digital Interface Rev 1 0 Sep 2003 COPYRIGHT 1994 2003 Eurotech S p A All Rights Reserved An0031...

Page 2: ...ained herein has been carefully verified Eurotech S p A assumes no responsibility for errors that might appear in this document or for damage to property or persons resulting from an improper use of t...

Page 3: ...table lists conventions used throughout this guide Icon Notice Type Description Information note Important features or instructions Warning Information to alert you to potential damage to a program s...

Page 4: ...This page is intentionally left blank...

Page 5: ...iew 7 J19 TFT Digital Interface Connector 8 J19 TFT Digital Interface Pin Out 9 J19 TFT Digital Interface Signal Description 10 Chapter 2 BIOS Setup 11 CPU 1232 BIOS Menu 11 CPU 1232 BIOS Flat Panel p...

Page 6: ...This page is intentionally left blank...

Page 7: ...ector The following table shows the supported LCD TFT video resolutions Resolution Simultaneous Colours Refresh Rate Hz 640x480 8bpp 256 colours 60 640x480 16bpp 64K colours 60 800x600 8bpp 256 colour...

Page 8: ...Figure 1 Connectors layout The following table shows the J19 connector type and its matching models Connector Reference Connector Type J19 Used Connector Hirose DF13 40DP 1 25V J19 Corresponding conne...

Page 9: ...24 BLUE5 MSB 23 RED5 MSB 26 BLUE4 25 RED4 28 GND 27 RED3 30 BLUE3 29 VDD Enable 32 BLUE2 31 BackLight Enable 34 BLUE1 33 RED2 36 BLUE0 LSB 35 RED1 38 GND 37 RED0 LSB 40 Dot Clock 39 GND Table 3 J19 TF...

Page 10: ...MAX 3 3V ENA_DISP Display Enable Display Enable indicates the active display portion of a scan line TTL 8mA VHMAX 3 3V VDD ENABLE TTL 8mA VHMAX 3 3V DATA ENABLE This is a data valid signal TTL 8mA VHM...

Page 11: ...ich BIOS settings to modify to properly control the LCD TFT For further information on how to set the BIOS please refer to the CPU 1232 user manual CPU 1232 BIOS Menu After entering BIOS setup pressin...

Page 12: ...Sync BP Back Porch Horizontal Sync 0 VSync FP Front Porch Vertical Sync 0 VSync AT Active Time Vertical Sync 0 VSync BP Back Porch Vertical Sync 0 Table 5 BIOS Flat Panel Options To insert the correct...

Page 13: ...ion Note 13 Table 6 Timing Characteristic Example for a TFT LCD The following instructions are an example on how to define the values to enter in the Setup relating to timing characteristics shown in...

Page 14: ...er the BIOS is 12 to obtain 96 12 x 8 HSync BP 6 Referring Table 6 HSync Pulse Back porch thb Typical value The reported value 48CLK The value you ve to enter the BIOS is 6 to obtain 48 6 x 8 VSync FP...

Page 15: ...Regarding the timing the following relationships should be ensured Horizontal Sync Period th Display Period thd Front Porch thf Pulse Width thp Back Porch thb Vertical Sync Period tv Display Period tv...

Page 16: ...and the Table 3 CPU 1232 connector pin out write a table with the connections between the J19 CPU 1232 connector and the TFT LCD selected this may be useful when building the connection cable Consult...

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