ANTARES - user manual
46
ETH_ANTARES_USM
Watchdog
Hardware watchdog
A MAX6369 hardware watchdog is fitted on the ANTARES board. The watchdog is disabled by default.
A watchdog timeout is selectable between 1ms and 60s and is control by QM57 GPIO pins.
The watchdog connections are as follows:
QM57
MAX6369 pin Description
GPIO14
SET0
Set Zero. Logic input for selecting startup delay and watchdog
timeout periods. See table below for timing details. (Pulled up by
default).
GPIO28
SET1
Set One. Logic input for selecting startup delay and watchdog
timeout periods. See table below for timing details. (Pulled up by
default).
GPIO57
SET2
Set Two. Logic input for selecting startup delay and watchdog timeout
periods. See table below for timing details. (Pulled down by default).
GPIO8
WDI
Watchdog Input. If WDI remains either high or low for the duration of
the watchdog timeout period (tWD), WDO triggers a pulse. The
internal watchdog timer clears whenever a WDO is asserted or
whenever WDI sees a rising or falling edge. (Pulled up by default).
SYS_RESET# WDO
Board
Reset.
The watchdog timeout settings are as follows:
SET2
SET1
SET0
Time out
0 0 0 1ms
0 0 1 10ms
0 1 0 30ms
0 1 1 Disabled
(default)
1 0 0 100ms
1 0 1 1s
1 1 0 10s
1 1 1 60s
