104
8-lane Rev 3.0 PCIe end-point
Applies to
1
The PCI Express Interface implements a
PCIe end-point
interface and provides
electrical power
to
the on-board circuits.
The 8-lane Rev 3.0 PCIe end-point:
●
complies with Revision 3.0 of the PCI Express Card Electromechanical specification.
●
supports 1-lane, 2-lane, 4-lane and 8-lane link width
●
supports PCIe Rev 3.0 link speed (8.0 GT/s with 128b/130b coding)
●
supports PCIe Rev 2.0 link speed (5.0 GT/s with 8b/10b coding)
●
supports the PCIe Rev 1.0 link speed (2.5 GT/s with 8b/10b coding)
●
supports payload size up to 512 bytes
●
offers the optimal performance when it is configured for 8-lane PCIe Rev 3.0 link speed (8
GT/s)
8-lane Rev 3.0 PCIe end-point to PC memory data transfer performance
Parameter
Conditions
Min.
Typ.
Max.
Unit
Sustainable output data rate
8-lane @ 8 GT/s (PCIe Rev 3.0)
6,700
MB/s
8-lane @ 5 GT/s (PCIe Rev 2.0)
3,400
MB/s
4-lane @ 8 GT/s (PCIe Rev 3.0)
3,350
MB/s
4-lane @ 5 GT/s (PCIe Rev 2.0)
1,700
MB/s
2-lane @ 8 GT/s (PCIe Rev 3.0)
1,700
MB/s
2-lane @ 5 GT/s (PCIe Rev 2.0)
800
MB/s
1-lane @ 8 GT/s (PCIe Rev 3.0)
800
MB/s
1
3602 Coaxlink Octo
,
3603 Coaxlink Quad CXP-12
,
3603-4 Coaxlink Quad CXP-12
,
3620
Coaxlink Quad CXP-12 JPEG
,
3620-4 Coaxlink Quad CXP-12 JPEG
and
3625 Coaxlink QSFP+
.
Coaxlink
Hardware Manual
