CONFIDENTIAL
2
Schematic Checklist
2.1.2 Analog Power Supply
Pin2 VDD3P3, pin3 VDD3P3, pin20 VDD3P3_RTC, pin55 VDDA, and pin56 VDDA are the analog power supply
pins, working at 3.0 V
~
3.6 V.
It should be noted that the sudden increase in current draw, when ESP32-S3 is transmitting signals, may cause a
power rail collapse. Therefore, it is highly recommended to add another 10
µ
F capacitor to the power trace,
which can work in conjunction with the 0.1
µ
F capacitor. In addition, a CLC filter circuit needs to be added near
VDD3P3 pins so as to suppress high-frequency harmonics. The recommended rated current of the inductor is
500 mA or above. Refer to Figure
and place the appropriate decoupling capacitor near each analog power
pin.
Notice:
• The recommended power supply voltage for ESP32-S3 is 3.3 V and the output current is no less than 500 mA.
• It is suggested to add an ESD protection diode at the power entrance.
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
The values of C11, L2 and C12
vary with the actual PCB board.
The values of C1 and C4 vary with
the selection of the crystal.
The value of R4 varies with the actual
PCB board.
NC: No component.
(Optional)
SPICLK
SPICS0
SPIHD
SPID
SPIWP
SPIQ
SPICS0
LNA_IN
GPIO39
GPIO41
GPIO42
U0RXD
GPIO46
GPIO45
U0TXD
SPICLK
GPIO48
SPID
SPIQ
SPIWP
SPIHD
GPIO9
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
CHIP_PU
GPIO38
GPIO37
GPIO36
GPIO35
GPIO47
GPIO40
GPIO33
GPIO34
G
P
IO
1
0
G
P
IO
1
1
G
P
IO
1
2
G
P
IO
1
2
G
P
IO
1
4
G
P
IO
1
5
G
P
IO
1
6
G
P
IO
1
7
G
P
IO
1
8
G
P
IO
1
9
G
P
IO
2
0
G
P
IO
2
1
S
P
IC
S
1
G
P
IO
2
6
SPICS1
SPICLK
SPIHD
SPID
SPIWP
SPIQ
RF_ANT
VDD_SPI
GND
GND
GND
VDD33
GND
GND
GND
GND
VDD33
GND
GND
VDD33
GND
VDD33
GND
GND
GND
VDD_SPI
GND
GND
VDD33
GND
GND
VDD_SPI
GND
GND
GND
GND
C11
TBD
R16
0
C12
TBD
C13
0.1uF
C4
TBD
C15
0.1uF
R3
499
R13
0
C14
1uF
C5
TBD
U1
ESP32-S3
V
D
D
A
5
6
LNA_IN
1
VDD3P3
2
VDD3P3
3
GPIO0
5
GPIO1
6
GPIO2
7
GPIO3
8
GPIO4
9
GPIO5
10
GPIO6
11
GPIO7
12
G
P
IO
1
0
1
5
G
P
IO
1
1
1
6
G
P
IO
1
2
1
7
G
P
IO
1
3
1
8
G
P
IO
1
4
1
9
X
T
A
L
_
3
2
K
_
P
2
1
V
D
D
3
P
3
_
R
T
C
2
0
X
T
A
L
_
3
2
K
_
N
2
2
G
P
IO
1
7
2
3
G
P
IO
1
8
2
4
G
P
IO
1
9
2
5
G
P
IO
2
0
2
6
VDD_SPI
29
SPIWP
31
SPICS0
32
SPIQ
34
SPID
35
SPICLK
33
SPICLK_N
36
G
N
D
5
7
SPICLK_P
37
GPIO33
38
G
P
IO
3
8
4
3
G
P
IO
4
6
5
2
X
T
A
L
_
N
5
3
X
T
A
L
_
P
5
4
M
T
M
S
4
8
M
T
D
O
4
5
U
0
T
X
D
4
9
V
D
D
3
P
3
_
C
P
U
4
6
CHIP_PU
4
V
D
D
A
5
5
M
T
D
I
4
7
GPIO8
13
GPIO9
14
G
P
IO
2
1
2
7
S
P
IC
S
1
2
8
SPIHD
30
GPIO34
39
GPIO35
40
GPIO36
41
U
0
R
X
D
5
0
G
P
IO
4
5
5
1
GPIO37
42
M
T
C
K
4
4
C9
TBD
C3
1uF
R15
0
C6
10uF
L1
0
L3
TBD
R1
10K(NC)
U2
FLASH-3V3
V
D
D
8
G
N
D
4
/CS
1
CLK
6
/HOLD
7
/WP
3
DO
2
DI
5
C10
0.1uF
Y1
40MHz(±10ppm)
X
IN
1
G
N
D
2
X
O
U
T
3
G
N
D
4
R
4
0
L2
TBD
C7
1uF
U3
PSRAM-3V3
V
D
D
8
V
S
S
4
CS
1
SCLK
6
SIO3
7
SIO2
3
SO/SIO1
2
SI/SIO0
5
C1
TBD
ANT1
PCB_ANT
1
2
R10
0
C2
10nF
R14
0
C8
0.1uF
Figure 3: Schematic for the Analog Power Supply Pins
Espressif Systems
8
ESP32-S3 Series Hardware Design Guidelines v1.0