Espressif Systems ESP8684 Series Hardware Design Manuallines Download Page 13

2

Schematic Checklist

Note:

The content below is excerpted from Section General Purpose Input / Output Interface (GPIO) in

ESP8684 Technical Reference Manual

.

ESP8684 series has 14 GPIO pins which can be assigned various functions by configuring corresponding

registers. Besides digital signals, some GPIOs can be also used for analog functions, such as ADC.

All GPIOs have selectable internal pull-up or pull-down, or can be set to high impedance. When these GPIOs are

configured as an input, the input value can be read by software through the register. Input GPIOs can also be set

to generate edge-triggered or level-triggered CPU interrupts. All digital IO pins are bi-directional, non-inverting

and tristate, including input and output buffers with tristate control. These pins can be multiplexed with other

functions, such as the UART, SPI, etc. For low-power operations, the GPIOs can be set to holding state.

The IO MUX and the GPIO matrix are used to route signals from peripherals to GPIO pins. Together they provide

highly configurable I/O. Using GPIO Matrix, peripheral input signals can be configured from any IO pins while

peripheral output signals can be configured to any IO pins. Table

4

shows the IO MUX functions of each

pin.

For more information about IO MUX and GPIO matrix, please refer to Chapter IO MUX and GPIO Matrix (GPIO,

IO_MUX) in

ESP8684 Technical Reference Manual

.

Table 4: IO MUX Pin Functions

Pin Name

No.

Function 0

Function 1

Function 2

Reset

Notes

GPIO0

4

GPIO0

GPIO0

0

R

GPIO1

5

GPIO1

GPIO1

0

R

GPIO2

6

GPIO2

GPIO2

FSPIQ

1

R

GPIO3

8

GPIO3

GPIO3

1

R

MTMS

9

MTMS

GPIO4

FSPIHD

1

R

MTDI

10

MTDI

GPIO5

FSPIWP

1

R

MTCK

12

MTCK

GPIO6

FSPICLK

1*

MTDO

13

MTDO

GPIO7

FSPID

1

GPIO8

14

GPIO8

GPIO8

1

GPIO9

15

GPIO9

GPIO9

3

GPIO10

16

GPIO10

GPIO10

FSPICS0

1

GPIO18

18

GPIO18

GPIO18

0

U0RXD

19

U0RXD

GPIO19

3

U0TXD

20

U0TXD

GPIO20

4

Reset

The default configuration of each pin after reset:

0

- input disabled, in high impedance state (IE = 0)

1

- input enabled, in high impedance state (IE = 1)

2

- input enabled, pull-down resistor enabled (IE = 1, WPD = 1)

3

- input enabled, pull-up resistor enabled (IE = 1, WPU = 1)

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ESP8684 Series Hardware Design Guidelines v1.1

Summary of Contents for ESP8684 Series

Page 1: ...te ESP8684 into other products ESP8684 is a series of ultra low power Wi Fi and Bluetooth 5 LE SoCs These guidelines will help to ensure optimal performance of your product with respect to tech nical...

Page 2: ...pply 17 3 4 Crystal Oscillator 18 3 5 RF 19 3 6 UART 21 3 7 Typical Layout Problems and Solutions 21 3 7 1 Q The current ripple is not large but the TX performance of RF is rather poor 21 3 7 2 Q The...

Page 3: ...Contents Revision History 27 Espressif Systems 3 Submit Documentation Feedback ESP8684 Series Hardware Design Guidelines v1 1...

Page 4: ...matic for the Oscillator 10 7 Schematic for RF Matching 11 8 Setup and Hold Times for the Strapping Pins 12 9 ESP8684 PCB Layout 15 10 Placement of ESP8684 Modules on Base Board 16 11 Keepout Zone for...

Page 5: ...hout the need for a host MCU ESP8684 series provides a highly integrated way to implement Wi Fi and Bluetooth LE technologies using a complete RF subsystem including a antenna switch RF balun power am...

Page 6: ...ND GND GND GND GND VDD33 G Title Size Date A4 Title Size Date A4 Title Size Date A4 C1 TBD R1 0 1 R2 499 1 Y1 40MHz XIN 1 GND 2 XOUT 3 GND 4 L1 2 0nH 0 1nH C9 TBD U2 ANT 1 VDDA3P3 2 VDDA3P3 3 GPIO0 4...

Page 7: ...0TXD 20 XTAL_N 22 XTAL_P 23 GND 25 GPIO3 8 VDDA 24 VDDA 21 GPIO18 18 C10 VDD33 C12 0 1uF 6 3V 10 0 1uF 6 3V 10 Figure 2 Schematic for the Digital Power Supply Pins 2 1 2 Analog Power Supply Pin 2 and...

Page 8: ...Sequence and System Reset 2 2 1 Power on Sequence ESP8684 uses a 3 3 V system power supply The chip should be activated after the power rails have stabilized This is achieved by delaying the activatio...

Page 9: ...ation of CHIP_EN signal level VIL_nRST to reset the chip 50 2 3 Flash ESP8684 series is embedded with 1 MB 2 MB or 4 MB flash It doesn t need to connect to external flash for firmware 2 4 Clock Source...

Page 10: ...tible with the crystal In case of defects in the circuit design you can still use the crystal The circuit for the oscillator is shown in Figure 6 5 4 3 NC No component The values of C8 L2 and C9 vary...

Page 11: ...g Pins Note The content below is excerpted from Section Strapping Pins in ESP8684 Series Datasheet ESP8684 series has two strapping pins GPIO8 GPIO9 Software can read the values of GPIO8 and GPIO9 fro...

Page 12: ...led and not controlled by GPIO8 1 The strapping combination of GPIO8 0 and GPIO9 0 is invalid and will trigger unexpected be havior Figure 8 shows the setup and hold times for the strapping pins befor...

Page 13: ...her they provide highly configurable I O Using GPIO Matrix peripheral input signals can be configured from any IO pins while peripheral output signals can be configured to any IO pins Table 4 shows th...

Page 14: ...ance state IE 1 We recommend pulling high or low GPIO pins in high impedance state to avoid unnecessary power consumption You may add pull up and pull down resistors in your PCB design referring to Ta...

Page 15: ...place any components on this layer It is acceptable to route signal traces on this layer when GND plane is applied A two layer PCB design can also be used Layer 1 TOP Signal traces and components Laye...

Page 16: ...ark are not recommended 1 2 3 4 5 Base board Feed Point Figure 10 Placement of ESP8684 Modules on Base Board If the positions recommended are not feasible please make sure that the module is not cover...

Page 17: ...mance When designing an end product attention should be paid to the interference caused by the housing of the antenna and it is recommended to carry out RF verification 3 3 Power Supply Figure 12 ESP8...

Page 18: ...o ensure a short return path As shown in Figure 13 it is recommended to connect the capacitor to ground in the LC filter circuit near VDD3P3 pins to the fourth layer through a via and maintain a keep...

Page 19: ...crystal oscillator It is best not to route any signal trace under the crystal oscillator The vias on the power traces on both sides of the crystal clock trace should be placed as far away from the cl...

Page 20: ...ranch out It should be as short as possible with dense ground vias around for inteference shielding The RF trace should be routed on the outer layer without vias i e should not cross layers The RF tra...

Page 21: ...ible surrounded by ground copper and ground vias 3 7 Typical Layout Problems and Solutions 3 7 1 Q The current ripple is not large but the TX performance of RF is rather poor Analysis The current ripp...

Page 22: ...tion caused by the impedance mismatch on the transmission line connecting the RF pin and the antenna Besides the impedance mismatch will affect the working state of the internal PA making the PA prema...

Page 23: ...downloaded in the flash If you need to download different firmware please follow the steps below 1 Set the module to UART Download mode by pulling IO9 pulled up by default low and IO8 high 2 Power on...

Page 24: ...delines please refer to the checklist in Espressif Hardware Examination Form https www espressif com en contact us technical inquiries hardware issues In case of doubt or discrepancy between this docu...

Page 25: ...Notes from Espressif folks https blog espressif com See the tabs SDKs and Demos Apps Tools AT Firmware https espressif com en support download sdks demos Products ESP8684 Series SoCs Browse through al...

Page 26: ...Amplifier RC Resistor Capacitor RTC Real Time Clock RX Receive SiP System in Package TX Transmit Zero ohm resistor A zero ohm resistor is a placeholder on the circuit so that another higher ohm resist...

Page 27: ...istory Date Version Release Notes 2022 05 20 v1 1 Added section RTC optional 2022 05 05 v1 0 First release 2022 01 10 v0 1 Draft Espressif Systems 27 Submit Documentation Feedback ESP8684 Series Hardw...

Page 28: ...OPOSAL SPECIFICATION OR SAMPLE All liability including liability for infringement of any proprietary rights relating to use of information in this document is disclaimed No licenses express or implied...

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