![Ericsson EDACS Monogram Series Maintenance Manual Download Page 22](http://html.mh-extra.com/html/ericsson/edacs-monogram-series/edacs-monogram-series_maintenance-manual_2423426022.webp)
AE/LZB119 1647 R1A
22
The ALE output line from U701 is applied to U702 pin
12. The lower address byte (A0-A7) is latched when the
ALE line transitions from high to low. The latched byte is
applied to U703 and U707 via the eight outputs (A0-A7)
from U702.
Address Decoding and Processor Control Outputs
This memory-mapped system uses a decoder in modem
U702 to provide address decoding (chip selection) for the
modem and RAM. Four active low outputs from U702
(Q0-Q3) are applied to the RAM (Q0 at pin 30) and the
modem chip (Q3 on pin 27).
Micro controller U701 generates the active low write
(WR) and read (RD) pulses for the external memory-
mapped devices at U701 pins 37 and 38, respectively.
U701 reads the external EEPROM when the program store
enable (PSEN) line from U701 pin 54 is low.
The micro controller addresses the upper 64K of
memory in the 128K flash EEPROM U703 using the output
on U701 pin 21. This line is connected to U703's A16
address input.
FLASH EEPROM U703
The radio's operating program is stored in 128K x 8-bit
flash EEPROM U703. Micro controller U701 executes this
program during normal radio operations.
EEPROM U703 can be "flashed" to upgrade the
operating program. This process allows easy
reprogramming of the radio's firmware for upgrades and
when additional features are added. During flash
programming operations, micro controller U701 runs a
simple masked program stored in itself to transfer the new
data arriving from the flash programming equipment into
U703. This provides easy reprogramming without the need
to disassemble the radio. Flash programming equipment is
connected to J104 and it uses the same interface circuitry
that is used to program the personality into EEPROM U104.
The micro controller is placed in the flash program
execution mode by the presence of 12V dc on the 7.5V dc
line. The flash program is then executed by sending a
proprietary protocol on the RX DATAand PTT/TX DATA
(J107 pin 7 and J108 pin 6 respectively) lines. With 12 Vdc
applied to the 7.5 Vdc line, transistors Q801 and Q802 turn
on. The collector of Q802 applies 12 Vdc to the VPP input
of U703 and voltage divider R726 and R727. The voltage
divider pulls EA/VPP input at U701 pin 56 high (5 volts) to
enable the flash programming mode.
The micro controller uses the A15 ENBL line (U701
pin 36) during flash programming to isolate writes to U703.
In normal radio operation, this line is always high to enable
the A15 address line from U701 pin 64 to arrive at U703
pin 11 via Q701. The address bank select line, U701 pin
21, is used to switch the flash memory bank from the lower
64K bank (when U701 pin 21 is low) to the higher 64K
bank (when U701 pin 21 is high) of the 128K x 8-bit total
flash memory. R779 and C756 provide a delay of this bank
select line to synchronize to the other address lines.
The flash memory requires a precise voltage of 11.5 to
12.5 VDC for proper programming. This voltage is
applied at the radios battery port. Damage to the flash
memory and other devices will result if the flash voltage
exceeds 12.5 VDC.
NOTE
RAM U707
Integrated circuit U707 is an 8192 x 8-bit high-speed
static RAM that provides temporary storage for micro
controller U701. Thirteen address lines are applied to the
RAM. The lower eight lines (A0-A7) are applied to it from
the 8-bit demultiplexer address latch inside modem U702.
The five higher address lines (A8-A12) are applied directly
from U701.
RAM chip selection is accomplished with the active-
low chip select pulse (U707 pin 20) from the modem.
Read/write control is achieved with the output enable input
(OE at U707 pin 22) and the active low write enable input
(U707 pin 27) from U701.
MODEM U702
Modem U702 performs several important functions for
the Digital board. These functions include:
•
high-speed data parallel-to-serial and serial-to-
parallel conversions.
•
address demultiplexing for the micro controller's
lower address byte(A0-A7) from the address/data
bus.
•
address decoding (chip selection) for itself and the
other memory-mapped integrated circuits.
•
reset logic for the micro controller and the ASP.
Summary of Contents for EDACS Monogram Series
Page 1: ...ericssonz ericssonz Maintenance Manual MONOGRAM SERIES EDACS Trunking Portable 800 MHz ...
Page 45: ...AE LZB 119 1647 R1A 45 COMPONENT PINOUT 780 202 0009 Sh 1 Rev A ...
Page 46: ...AE LZB119 1647 R1A 46 COMPONENT PINOUT 780 202 0009 Sh 2 Rev A ...
Page 47: ...AE LZB 119 1647 R1A 47 SYSTEM WIRING DIAGRAM 930 010 0002 Rev A ...
Page 48: ...AE LZB119 1647 R1A SERVICE OUTLINE 48 KEYPAD DISPLAY BOARD 930 010 0002 Rev A ...
Page 49: ...SCHEMATIC DIAGRAM AE LZB 119 1647 R1A 49 PTT SWITCH BOARD 650 180 0001 S1800001 Rev A ...
Page 50: ...AE LZB119 1647 R1A SCHEMATIC DIAGRAM 50 KEYPAD DISPLAY BOARD 650 170 0001 S1700001 Rev A ...
Page 51: ...RF BOARD 650 020 0002 770 020 0002 Rev D AE LZB 119 1647 R1A 51 ...
Page 52: ...DIGITAL BOARD 650 010 0003 770 010 0003 Sh 1 Rev E AE LZB 119 1647 R1A 52 ...
Page 53: ...DIGITAL BOARD 650 010 0003 770 010 0003 Sh 2 Rev E AE LZB 119 1647 R1A 53 ...
Page 54: ...BLOCK DIAGRAM 060 010 0001 Rev B AE LZB 119 1647 R1A 54 ...
Page 55: ...This page intentionally left blank AE LZB 119 1647 R1A 55 ...