7: Memory Management Unit
7-20
EPSON
ARM720T CORE CPU MANUAL
7.7.2
Translation fault
There are two types of translation fault:
Section
A section translation fault is generated if the level one descriptor is
marked as invalid. This happens if bits [1:0] of the descriptor are
both 0.
Page
A page translation fault is generated if the level two descriptor is
marked as invalid. This happens if bits [1:0] of the descriptor are
both 0.
7.7.3
Domain fault
There are two types of domain fault:
Section
The level one descriptor holds the 4-bit domain field, which selects
one of the 16 2-bit domains in the Domain Access Control Register.
The two bits of the specified domain are then checked for access
permissions as described in Table 7-11 on page 7-18. The domain is
checked when the level one descriptor is returned.
Page
The level one descriptor holds the 4-bit domain field, which selects
one of the 16 2-bit domains in the Domain Access Control Register.
The two bits of the specified domain are then checked for access
permissions as described in Table 7-11 on page 7-18. The domain is
checked when the level one descriptor is returned.
If the specified access is either no access (b00) or reserved (b10) then either a section domain
fault or page domain fault occurs.
7.7.4
Permission fault
If the 2-bit domain field returns 01 (client) then access permissions are checked as follows:
Section
If the level one descriptor defines a section-mapped access, the AP
bits of the descriptor define whether or not the access is allowed,
according to Table 7-11 on page 7-18. Their interpretation is
dependent on the setting of the S and R bits (control register bits 8
and 9). If the access is not allowed, a section permission fault is
generated.
Large page or small page
If the level one descriptor defines a page-mapped access and the
level two descriptor is for a large or small page, four access
permission fields (AP3-AP0) are specified, each corresponding to
one quarter of the page. For small pages ap3 is selected by the top
1KB of the page and ap0 is selected by the bottom 1KB of the page.
For large pages, ap3 is selected by the top 16KB of the page and ap0
is selected by the bottom 16KB of the page. The selected AP bits are
then interpreted in exactly the same way as for a section (see
Table 7-11 on page 7-18). The only difference is that the fault
generated is a page permission fault.
Tiny page
If the level one descriptor defines a page-mapped access and the
level two descriptor is for a tiny page, the AP bits of the level one
descriptor define whether or not the access is allowed in the same
way as for a section. The fault generated is a page permission fault.
Summary of Contents for ARM720T Core cpu
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Page 13: ...Preface ...
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Page 19: ...1 Introduction ...
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Page 59: ...3 Configuration ...
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Page 71: ...4 Instruction and Data Cache ...
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Page 75: ...5 Write Buffer ...
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Page 79: ...6 The Bus Interface ...
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Page 119: ...8 Coprocessor Interface ...
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Page 131: ...9 Debugging Your System ...
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Page 199: ...Appendix A Signal Descriptions ...
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Page 209: ...Glossary ...
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