EPOX P55-TH User Manual Download Page 6

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2-2 P55-TH

1.Power LED(+)
2.N/C
3.GND
4.Keylock
5.GND

JP5

IDE LED indicator

- LED ON when Onboard PCI IDE

Harddisks activites.

2-2 Connectors and Jumpers

This section describes all of the connectors and jumpers equipped in the
motherboard. Please refer to

Figure 1-1

for actual location of each connector and

jumper.

KeyLock

- Keyboard lock switch & Power LED connector.

Speaker

- connect to the system's speaker for beeping.

1. Speaker
2. N/C
3. GND
4. GND

Reset

- Close to restart system.

J44

Turbo LED indicator -

LED ON when higher speed is

selected by a BIOS hot key<CTRL><ALT><+>and also brings
system to a slower speed while a hot key<CTRL><ALT><->.

Power Saving LED indicator(Green-LED)

LED ON when

system is in any Saving mode.

J7 1 2

The Power supply of the CPU cooling fan

1,2 GND
3,4 +12v

5 6

5,6 GND

3 4

Summary of Contents for P55-TH

Page 1: ...ts and company names are trademarks or registered trademarks of their respective holders with OnboardPCIIDEandSuperMulti I O P55 TH ISAPCIM otherB o ard The specification is subject to change without notice 82430HX PCIset ...

Page 2: ...etup 3 2 BIOS Features Setup 3 2 Chipset Features Setup 3 6 Power Management Setup 3 8 PNP PCI Configuration Setup 3 10 Integated Peripherals 3 14 Load Setup Defaults 3 12 Change password 3 15 IDE HDD Auto Detection 3 16 HDD Low Level Format 3 18 Save Exit Setup 3 18 Exit Without Saving 3 18 Chapter 4 Onboard Technical Information 4 1 I O Memory Map 4 1 Time DMA Channels Map 4 2 Interrupt Map 4 2 ...

Page 3: ...y Intel 82430HX PCIset chipset Supports Onboard Pipelined burst synchronous and the COAST v2 0 or later Version solusion L2 Write Back Cache The cache memory combination could be 256KB 512KB 32KB 32 or 64KB 32 SRAM respectively Support four 16 bits ISA slots four 32 bits PCI slots and provides two independent high performance PCI IDE interface capable of supporting PIO Mode 3 and Mode 4 devices Th...

Page 4: ...1 1 1 1 81 160 80 BANK1 TAG SRAM U20 J7 12V GND GND BIOS COM1 P55 TH Layout K B CONN U31 U30 82438 BANK0 PCI 2 JP5 1 JP12 G LED RESET SLEEP KEYLOCK TB LED J2 J3 J6 J1 J44 TXC J25 1 3 1 5 COM2 CPU FAN PCI 4 SMC 37C669 PIIX3 82371 intel 32K 32 JP14 RTC Q1 Q2 1 3 JP8 JP6 1 3 JP11 JP10 J10 1 14 13 26 JP1 32K 32 3 1 JP3 1 J24 SPKR J33 JP15 J13 J14 J11 J15 ...

Page 5: ...rheat The P55 TH supports minimum of 8MB of System Memory and maximum of 512MB while L2 Cache can be 256KB 512KB synchronous SRAM Onboard with the COASt 2 0 or later Version Cache On A STick solution to increase system performance refer to Page 2 5 Cache Memory Configuration for the details The P55 TH support standard Fast Page or EDO Extended Data Out or Hyper Page Mode DRAM The EDO DRAM is desig...

Page 6: ...nnector and jumper J1 KeyLock Keyboard lock switch Power LED connector J2 Speaker connect to the system s speaker for beeping 1 Speaker 2 N C 3 GND 4 GND J3 Reset Close to restart system J44 Turbo LED indicator LED ON when higher speed is selected by a BIOS hot key CTRL ALT and also brings system to a slower speed while a hot key CTRL ALT J6 Power Saving LED indicator Green LED LED ON when system ...

Page 7: ...Hz JP6 EPROM BIOS Select 1 2 for 5V Flash EPROM 2 3 for 12V Flash EPROM Note The JP6 setting is depand on which EPROM type was attach board JP8 BIOS FLASH MODE 1 2 for normal flash mode Default 2 3 for 12V Flash EPROM to do BOOT BLOCK Flash Mode J10 PS 2 MOUSE CONNECTOR 1 RED wire 2 BLUE wire 3 GREEN wire 4 NC 3 1 J33 IrDA ASK IR CONNECTOR 1 VCC 2 NC 3 IRRX 4 GND 5 IRTX 5 1 1 2 3 J25 System AT BUS...

Page 8: ...20 100MHz 11 24 12 25 13 26 1 14 50 75MHz 2 15 60 90MHz R Pentium Processor Cyrix 6x86 Processor BANK1 Single Side DRAM BANK2 3 Dual Side DRAM BANK0 Single Side DRAM BANK0 1 Dual Side DRAM M4 M2 M3 M1 2 3 System Memory Configuration The P55 TH supports different type of settings for the system memory There is no jumper nor connector needed for memory configuration Following figures provides all po...

Page 9: ...M x 32 8 MB 48MB 4M x 32 16 MB 4M x 32 16 MB 64MB 4M x 32 16 MB 8M x 32 32 MB 96MB 8M x 32 32 MB Empty 64MB 8M x 32 32 MB 1M x 32 4 MB 72MB 8M x 32 32 MB 2M x 32 8 MB 80MB 8M x 32 32 MB 4M x 32 16 MB 96MB 8M x 32 32 MB 8M x 32 32 MB 128MB 16M x 32 64MB S 16M x 32 64MB S 256MB 16M x 32 64MB D 16M x 32 64MB D 512MB NOTE 1 P55 TH support both Fast Page DRAM or EDO DRAM SIMMs but they cannot be mixed ...

Page 10: ...to accommodate 256KB 512KB piplined burst synchronous SRAM Jumper JP10 and JP11 settings is used to Onboard s synchronous SRAM for differential such combinations Please refer to following configurations for the details Size U30 U31 SRM1 JP10 JP11 SYN CACHE On Board On Module Jumper Setting 80 1 81 160 v Pipelined burst SRAM Modules COASt 2 x 256KB 256KB None 1 2 1 2 256KB None 256KB 1 2 2 3 512KB ...

Page 11: ...had mounted 256 KB 32K 32x2 synchronous SRAM 32K 32 32K 32 TAG SRAM Figure 2 1 COAST MODULE Note When you have a cache module to plug into a 160 pin daul readout connector You must made sure that cache modules is followed Intel COASt 2 0 or later version Please contact the modules supplier to avoid not working properly or damaging and modules circuits ...

Page 12: ...ility If however a Legacy card such as plug paddle card and cable into the ISA slot is plugged in the system modification in the ROM SETUP UTILITY become necessary First enter PNP PCI CONFIGURATION SETUPutility from ROM SETUP UTILITY main menu to set the IRQ X or DMA X assigned to legacy ISA or PCI ISA PNP cards Second you must be enter CHIPSET FEATURES SETUP UTILITYfrom ROM SETUP UTILITY main men...

Page 13: ...SETUP UTILITY The menu displays all the major selection items and allow user to select any one of shown item The selection is made by moving cursor press any direction key to the item and press Enter key An on_line help message is displayed at the bottom of the screen as cursor is moving to various items which provides user better understanding of each function When a selection is made the menu of...

Page 14: ...to display help message of the selected item This setup program also provide 2 convinent ways to load the default parameter data from BIOS F6 or CMOS F7 area if shown data is corrupted This provide the system a capability to recover from any possible error 3 2 BIOS FEATURES SETUP NOTE The Halt On field is to determine when to halt the system by the BIOS if error occurred during POST NOTE If hard d...

Page 15: ...ctivates automatically when th e system boots up causing a warning message to appear when anything attempts to access the boot sector or hard disk partition table Disabled No warning message to appear when anything attempts to access the boot sector or hard disk partition table ROM PCI ISA BIOS BIOS FEATURES SETUP AWARD SOFTWARE INC Figure 3 3 BIOS FEATURES SETUP Esc Quit Select Item F1 Help PU PD...

Page 16: ...nabled Floppy A B will be swapped under the DOS Disabled Floppy A B will be not swap Boot Up Floppy Seek During POST BIOS will determine if the floppy disk drive installed is 40 or 80 tracks 360K type is 40 tracks while 760K 1 2M and 1 44M are all 80 tracks The default value is Enabled Enabled BIOS searches for floppy disk drive to determine if it is 40 or 80 tracks Note that BIOS can not tell fro...

Page 17: ... access to the system and Setup or just to Setup The default value is Setup System The system will not boot and access to Setup will be denied if the correct password is not entered at the prompt Setup The system will boot but access to Setup will be denied if the incorrect password is not entered at the prompt PCI VGA Palette Snoop This filed controls the ability of a primary PCI VGA controller t...

Page 18: ...ry Time 1 Memory Hole At 15M 16M Disabled ESC Quit select Item Peer Concurrency Enabled F1 Help PU PD Modify Chipset Special Features Enabled F5 Old Values Shift F2 Color DRAM ECC PARITY Select ECC F7 Load Setup Defaults Memory Parity ECC Check Auto C8000 CBFFF Shadow CC000 CFFFF Shadow D0000 D3FFF Shadow D4000 D7FFF Shadow D8000 DBFFF Shadow DC000 DFFFF Shadow These categories determine whether o...

Page 19: ... Disabled Normal Setting Enabled This field enableds the main memory 15 16MB remap to ISA BUS Peer Concurrency The default value is Enabled DRAM ECC PARITY Select The default value is ECC This field defines the DRAM is parity or ECC properly if all DRAs are 72 bit wide A system with a mixture of 64 bit and 72 bit wide should disable PARITY and ECC Memory Parity ECC Check The default value is Auto ...

Page 20: ...od V H SYNC Blank IRQ4 COM 1 ON IRQ5 LPT 2 ON Doze Mode Disable IRQ6 Floppy Disk ON Standby Mode Disabled IRQ7 LPT 1 OFF Suspend Mode Disabled IRQ8 RTC Alarm OFF HDD Power Down 15 Min IRQ9 IRQ2 Redir ON IRQ10 Reserved ON Wake Up Events In Doze Standby IRQ11 Reserved ON IRQ3 Wake Up Event ON IRQ12 PS 2 Mouse ON IRQ4 Wake Up Event ON IRQ13 Coprocessor ON IRQ8 Wake Up Event ON IRQ14 Hard Disk ON IRQ1...

Page 21: ...or is installed In addition the suspend function is supported when the JP14 sleep ref Figure1 1 be close to enter the green function The detail description of these functions are provided in next page HDD Standby Mode When system stop reading or wiriting HDD the timer starts to count The system will cut off the HDD power when timer ran out of time The system will not resume operation until either ...

Page 22: ...ONFIGURATION The PNP PCI configuration program is for the user to modify the PCI ISA IRQ signals when various PCI ISA cards are inserted in the PCI or ISA slots WARNING Any misplacing IRQ could cause system can t pick out the rescouces ROM PCI ISA BIOS PNP PCI CONFIGURATION AWARD SOFTWARE INC ESC Quit Select Item F1 Help PU PD Modify F5 No Change Shift F2 Color F7 Load Setup Defaults Resources Con...

Page 23: ...nabled and to clear ESCD one time When some Legacy cards were removed PCI IDE IRQ Map To The default value is PCI AUTO PCI Chipset INTA INTD PCI 1 PCI 2 PCI 3 INTA INTD INTD INTC INTB INTC INTB INTB INTA INTD INTC INTC INTB INTA PCI 4 INTA INTB INTC INTD Figure 3 7 The Combination of PCI INT lines When you have true PCI card s plugged into the system you will not need to change any thing here in t...

Page 24: ...sable Disabled Disable IDE HDD Block Mode PCI Slot IDE 2nd Channel The default value is Enabled Enabled Enable secondary IDE port and BIOS will assign IRQ15 for this port Disabled Disable secondary IDE port and IRQ15 is available for other device If you don t use the Onboard IDE connector than use On card PCI or ISA card IDE connector You will set Onboard Primary PCI IDE Disabled and Onboard Secon...

Page 25: ... 1 and address is 2F8H IRQ3 COM3 Enable Onboard Serial port 1 and address is 3E8H IRQ4 COM4 Enable Onboard Serial port 1 and address is 2E8H IRQ3 Disabled Disable Onboard SMC CHIP s Serial port 1 IDE Secondary Master PIO The default value is Auto Auto BIOS will automatically detect the Onboard Secondary Master PCI IDE HDD Accessing mode Mode0 4 Manually set the IDE Accessing mode IDE Primary Slave...

Page 26: ...ode This fields allow the user to sellect the parallel port mode The default value is ECP EPP Normal Standard mode IBM PC AT Compatible bidirectional parallel port EPP Enhanced Parallel Port mode ECP Extended Capabilities Port mode EPP ECP ECP Mode EPP Mode ECP Mode USE DMA This fields allow the user to sellect DMA1 or DMA3 for the ECP mode The default value is DMA3 DMA1 The filed selects the roun...

Page 27: ... password the SETUP UTILITY will display a message and ask for a confirmation Confirm Password 3 Afterpressingthe Enter key ROMpasswordiftheoptionwasnotused orcurrent password user defined password the user can change the password and store new one in CMOS RAM A maximum of 8 characters can be entered 3 8 CHANGE SUPERVISOR or USER PASSWORD ROM PCI ISA BIOS CMOS SETUP UTILITY AWARD SOFTWARE INC Load...

Page 28: ...SKS TYPE SIZE CYLS HEADS PRECOMP LANDZONE SECTORS MODE Primary Master 343 665 16 65535 664 63 NORMAL Primary Slave Secondary Master Secondary Slave Select Secondary Slave Option N Skip N OPTIONS SIZE CYLS HEAD PRECOMP LANDZ SECTOR MODE 1 Y 0 0 0 0 0 0 NORMAL ESC Skip NOTE HDD Modes The Award BIOS supports 3 HDD modes NORMAL LBA LARGE NORMAL mode Generic access mode in which neither the BIOS nor th...

Page 29: ...ector 63 x bytes per secttor 512 8 4 Gigabytes LARGE mode Extended HDD access mode supported by Award Software Some IDE HDDs contain more than 1024 cylinder without LBA support in some cases user do not want LBA The Award BIOS provides another alternative to support these kinds of LARGE mode CYLS HEADS SECTOR MODE 1120 16 59 NORMAL 560 32 59 LARGE BIOS tricks DOS or other OS that the number of cyl...

Page 30: ... number of the hard disk drive you wish to perform low level format You may select from 1 to 8 Check the documentation that came with the drive for the correct interleave number or select 0 for utility automatic detection Auto scan bad track This allows the utility to scan first then format by each track Start Press Y to start low level format 3 11 SAVE EXIT SETUP 3 12 EXIT WITHOUT SAVING The SAVE...

Page 31: ...F 4K Plug and Play ESCD data area FE000 FFFFF 8K BIOS runtime service routine 1 000 01F DMA controller Master 020 021 INTERRUPT CONTROLLER Master 022 023 CHIPSET control registers I O ports 040 05F TIMER control registers 060 06F KEYBOARD interface controller 8042 070 07F RTC ports CMOS I O ports 080 09F DMA register 0A0 0BF INTERRUPT controller Slave 0C0 0DF DMA controller Slave 0F0 0FF MATH COPR...

Page 32: ...ult DMA Channel 4 Cascade for DMA controller 1 DMA Channel 5 Available DMA Channel 6 Available DMA Channel 7 Available 4 3 INTERRUPT MAP NMI Parity check error IRQ H W 0 System TIMER interrupt from TIMER 0 1 KEYBOARD output buffer full 2 Cascade for IRQ 8 15 3 SERIAL port 2 4 SERIAL port 1 5 PARALLEL port 2 6 FLOPPY DISK SMC CHIP 7 PARALLEL port 1 8 RTC clock 9 Available 10 Available 11 Available ...

Page 33: ...atus register D 0E Diagnostic status byte 0F Shutdown byte 10 FLOPPY DISK drive type byte 11 Reserve 12 HARD DISK type byte 13 Reserve 14 Equipment type 15 Base memory low byte 16 Base memory high byte 17 Extension memory low byte 18 Extension memory high byte 19 2d 2E 2F 30 Reserved for ectension memory low bytw 31 Reserved for extension memory high byte 32 DATE CENTURY byte 33 INFORMATION FLAG 3...

Page 34: ... CMOS s basic R W functionality Auto detection of onboard DRAM Cache Copy the BIOS from ROM into E0000 FFFFF shadow RAM so that POST will go faster Test the first 256K DRAM OEM specific cache initialization if needed 1 Initialize the first 32 interrupt vectors with corresponding Interrupt handlers Initialize INT no from 33 120 with Dummy Suprious Interrupt Handler 2 Issue CPUID instruction to iden...

Page 35: ...und 2 Show messages including Award Logo Copyright string BIOS Data code Part No OEM specific sign on messages Energy Star Logo Green BIOS ONLY CPU brand type speed Test system BIOS checksum Non Compress Version only DMA channel 0 test DMA channel 1 test DMA page registers test Reserved Test 8254 Timer 0 Counter 2 Test 8259 interrupt mask bits for channel 1 Test 8259 interrupt mask bits for channe...

Page 36: ...y the cache is turn on later in POST 61h Reserved 1 Program the rest of the Chipset s value according to Setup Later Setup Value Program 2 If auto configuration is enabled programmed the chipset with pre defined Values Initialize floppy disk drive controller Initialize Hard drive controller If it is a PnP BIOS initialize serial parallel ports Reserved Initialize math coprocessor Reserved If there ...

Page 37: ...into a timer tick value Setup Virus Protection Boot Sector Protection functionality according to Setup setting 1 Try to turn on Level 2 cache Note if L2 cache is already turned on in POST 3D this part will be skipped 2 Set the boot up speed according to Setup setting 3 Last chance for Chipset initialization 4 Last chance for Power Management initialization Green BIOS only 5 Show the system configu...

Page 38: ...or 1 6 5 10 1 14 13 26 Signal Name Pin Pin Signal Name Signal Name Pin Pin Signal Name DCD SIN SOUT DTR GND 1 6 DSR 2 7 RTS 3 8 CTS 4 9 RI 5 10 N C STROBE Data Bit 0 Data Bit 1 Data Bit 2 Data Bit 3 Data Bit 4 Data Bit 5 Data Bit 6 Data Bit 7 ACJ BUSY PE SLCT 1 14 AUTO FEED 2 15 ERROR 3 16 INIT 4 17 SLCT IN 5 18 Ground 6 19 Ground 7 20 Ground 8 21 Ground 9 22 Ground 10 23 Ground 11 24 Ground 12 25...

Page 39: ...IR 19 20 STEP 21 22 Write Data 23 24 Write Gate 25 26 Track 00 27 28 Write Protect 29 30 Read Data 31 32 SIDE 1 SELECT 33 34 Diskette Reset IDE Host Data 7 Host Data 6 Host Data 5 Host Data 4 Host Data 3 Host Data 2 Host Data 1 Host Data 0 Ground DRQ3 I O Write I O Read IOCHRDY DACK3 IRQ14 Addr 1 Addr 0 Chip Select 0 Activity 1 2 Ground 3 4 Host Data 8 5 6 Host Data 9 7 8 Host Data 10 9 10 Host Da...

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