
BIOS
EP-3S1M
Page 4-10
4-3 Advanced Chipset Features
This section allows you to configure the system based on the specific features of
the installed chipset. This chipset manages bus speeds and access to system memory
resources, such as DRAM and the external cache. It also coordinates communica-
tions between the conventional ISA bus and the PCI bus. It must be stated that these
items should never need to be altered. The default settings have been chosen be-
cause they provide the best operating conditions for your system. The only time you
might consider making any changes would be if you discovered that data was being
lost while using your system.
DRAM Settings
(This field is no function)
The first chipset settings deal with CPU access to dynamic random access memory
(DRAM). The default timings have been carefully chosen and should only be altered
if data is being lost. Such a scenario might well occur if your system had mixed
speed DRAM chips installed so that greater delays may be required to preserve the
integrity of the data held in the slower memory chips.
Summary of Contents for EP-3S1M
Page 6: ...EP 3S1M Page Left Blank...
Page 14: ...Introduction EP 3S1M Page 1 8 Figure 5 System Block Diagram System Block Diagram...
Page 17: ...Installation EP 3S1M Page 3 1 Section 3 INSTALLATION...
Page 18: ...Installation EP 3S1M Page 3 2 Figure 1 EP 3S1M Detailed Layout...
Page 32: ...Installation EP 3S1M Page 3 16 Page Left Blank...
Page 61: ...Drivers Installation EP 3S1M Page 5 2 Page Left Blank...
Page 73: ...Appendix EP 3S1M A 12 Page Left Blank...