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Demonstration System EPC9087
Figure 2: Proper measurement of the switch nodes.
Figure 1: Block diagram of EPC9087 development board.
+
7 V – 12 V
+
A
Switch node
External circuit
< 80
V
DD
supply
V
IN
supply
Gate drive supply
(note polarity)
PWM input
I
IN
_
+
V
IN
(For efficiency
measurement)
_
_
V
EPC9087, 100 V DEVELOPMENTBOARD
Rev. 1.0
C
Bypass
Le
ve
l s
hif
t
PGND
Gate drive
regulator
Logic and
dead-time
adjust
V
DD
V
IN
Q
1
Q
2
GND
PWM
Output
LM5113