EN5367QI
Evaluation Board User Guide
Jan. 2012
Page 3 of 8
STEP 3:
Connect the load to the output connectors VOUT (+) and GND (-), as
indicated in Figure 1.
STEP 4:
Select the output voltage setting jumper. Figure 2 shows what output voltages
are achieved by selecting each jumper position. Populating multiple jumper positions
will allow you to select higher output voltages. You can populate up to all four jumper
positions for the highest V
OUT
of approximately 3.73V with the resistors populated on the
board.
Figure 2: Output Voltage selection jumpers
Jumper shown selects 1.55V output
(Jumper positions from left to right are: 2.25V, 1.55V, 1.2V and 1.0V)
STEP 5:
Set the POK PWR and SYNC/LLM jumpers to desired positions (see Figure 1).
You should disable POK when measuring low value input currents. The SYNC/LLM
jumper should be tied low unless external frequency synchronization is required.
STEP 6:
Apply V
IN
to the board and move the ENA jumper to the enabled position. The
EN5367QI is now powered up! Various measurements such as efficiency, line and load
regulation, input / output ripple, load transient, drop-out voltage measurements may be
conducted at this point. The over current trip level, short circuit protection, under voltage
lock out thresholds, temperature coefficient of the output voltage may also be measured
in this configuration.
CAUTION: The maximum allowable VIN for this device is 5.5V.
STEP 6A: Power Up/Down Behavior
– Remove ENA jumper and connect a pulse
generator (output disabled) signal to the clip-on test point below ENA and Ground. Set
the pulse amplitude to swing from 0 to 2.5 volts. Set the pulse period to 10msec. and
duty cycle to 50%. Hook up oscilloscope probes to ENA, POK and VOUT with clean
ground returns. Apply power to evaluation board. Enable pulse generator output.
Observe the VOUT voltage ramps as ENA goes high and again as ENA goes low. The
device when powered down ramps down the output voltage in a controlled manner
before fully shutting down. The output voltage level when POK is asserted /de-asserted
as the device is powered up / down may be observed as well as the clean output
voltage ramp and POK signals.
STEP 7: External Clock Synchronization / Spread Spectrum Modes
: In order to
activate this mode, it may be necessary to a solder a SMA connector at J7. Alternately
