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Endace Measurement Systems Limited

http://www.endace.com

EDM01.05-04r1 DAG 3.6GE User Manual

Copyright, all rights reserved.

14

Revision 7. 22 September 2005.

USE THIS SPACE FOR NOTES

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Summary of Contents for DAG 3.6GE

Page 1: ...EDM01 05 04r1 DAG 3 6GE Card User Manual 2 5 5r1...

Page 2: ...9246 Hamilton 2001 New Zealand Phone 64 7 839 0540 Fax 64 7 839 0543 support endace com www endace com Endace USA Ltd Suite 220 11495 Sunset Hill Road Reston Virginia 20190 United States of America Ph...

Page 3: ...digital device pursuant to Part 15 of the Federal Communications Commission FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is oper...

Page 4: ...DENCE TESTING 7 3 1 Interpreting DAG 3 6GE Card LED Status 7 3 2 DAG 3 6GE Card LED Display Functions 8 3 3 Configuration in WYSYCC style 9 3 4 DAG 3 6GE Card Capture Session 10 3 5 Inspect Interface...

Page 5: ...Endace Measurement Systems Limited http www endace com EDM01 05 04r1 DAG 3 6GE User Manual Copyright all rights reserved ii Revision 7 22 September 2005 USE THIS SPACE FOR NOTES...

Page 6: ...3 6GE Card System Requirements 1 1 User Manual Purpose Description The purpose of this DAG 3 6GE Card User Manual is to identify and describe Installing DAG 3 6GE Card Confidence Testing Running Data...

Page 7: ...card Figure 1 1 DAG 3 6GE series PCI Card 1 3 DAG 3 6GE Card Architecture Description The DAG 3 6GE PCI bus card is designed for cell and packet capture and generation on IP networks Serial Ethernet d...

Page 8: ...ctly The DAG 3 6GE can also be connected to a NIC card using an Ethernet cross over cable The DAG captures all packets received on this port similar to a NIC in promiscuous mode 1 4 DAG 3 6GE Card Ext...

Page 9: ...ontinued Operating system For convenience the Debian 3 1 Sarge Linux system is included on the Endace Software Install CD Endace currently supports Windows XP Windows Server 2000 Windows Server 2003 F...

Page 10: ...ually a limitation as for most applications a maximum of two cards only can be used with reasonable application performance In this chapter This chapter covers the following sections of information In...

Page 11: ...a NIC card using an Ethernet cross over cable The second DAG 3 6GE card RJ45 socket near PCI connector is for time synchronization input This socket should never be connected to an Ethernet network or...

Page 12: ...ocess In this chapter This chapter covers the following sections of information Interpreting DAG 3 6GE Card LED Status DAG 3 6GE Card LED Display Functions Configuration in WYSYCC style DAG 3 6GE Card...

Page 13: ...hone 8 7 Figure 3 2 LED State for DAG 3 6GE Card With no network connection LED on stages The following table describes the LED display definitions LED Description Receive activity LED 1 LED 2 Link up...

Page 14: ...ent configuration Each of the items displayed can be changed as follows Configuration options reset reset the ethernet framers set auto mode default reset the ethernet framer set auto mode auto set au...

Page 15: ...specific scrambling options in use If the information cannot be obtained reliably the card can be made to work by varying the parameters until data is arriving at the host system Step 3 Check FPGA Im...

Page 16: ...ted to check the card is locked to the data stream dag endace dagthree d dag0 si The tool displays a number of status bits that have occurred since last reading The following example shows the interva...

Page 17: ...1 0 1 0 0 100 1 1 0 1 0 0 100 1 1 0 1 0 0 The following example is for a card locked to a 1000base T stream dag endace dagthree d dag0 si Spd Lnk FD MA Neg RF JB 1000 1 1 0 1 0 0 1000 1 1 0 1 0 0 100...

Page 18: ...and serial number 2 Host PC type and configuration 3 Host PC operating system version 4 DAG software version package in use 5 Any compiler errors or warnings when building DAG driver or tools 6 For L...

Page 19: ...Endace Measurement Systems Limited http www endace com EDM01 05 04r1 DAG 3 6GE User Manual Copyright all rights reserved 14 Revision 7 22 September 2005 USE THIS SPACE FOR NOTES...

Page 20: ...driver is loaded the firmware has been downloaded and the card is configured The integrity of the card s physical layer is then set and checked Process Starting a data capture session is described in...

Page 21: ...fixed length 64 byte records for example choose slen 44 64 ERF header size of 16 alignment padding 4 dagthree d dag0 novarlen slen 44 Setting packet capture settings Capture settings must be set for...

Page 22: ...is read out of the buffer to free some space any arriving packets subsequently are discarded by the DAG 3 6GE card Any loss can be detected in band by observing the Loss Counter lctr field of the Ext...

Page 23: ...Endace Measurement Systems Limited http www endace com EDM01 05 04r1 DAG 3 6GE User Manual Copyright all rights reserved 18 Revision 7 22 September 2005 USE THIS SPACE FOR NOTES...

Page 24: ...en DAG cards and coordinated universal time UTC Accurate time reference can be obtained from an external clock by connecting to the DAG card using the synchronization connector or the host PCs clock c...

Page 25: ...out sync timeout in seconds default 60 l threshold health threshold in ns default 596 Option default RS422 in none out none None in none out rs422in RS422 input hostin Host input unused overin Interna...

Page 26: ...drifts smoothly at the same rate as the PC clock If a PC is running NTP to synchronise its own clock then the DUCK clock is less smooth because the PC clock is adjusted in small jumps However overall...

Page 27: ...absolute time of packet time stamps being correct then one card is configured as the clock master for the other Locking cards together Although the master card s clock will drift against UTC the card...

Page 28: ...error Freq 691ppb Phase 394ns Worst Freq 143377ppb Worst Phase 88424ns crystal Actual 49999354Hz Synthesized 16777216Hz input Total 87464 Bad 0 Singles Missed 0 Longest Sequence Missed 0 start Wed Ap...

Page 29: ...023Hz Synthesized 67108864Hz input Total 225 Bad 0 Singles Missed 1 Longest Sequence Missed 1 start Thu Apr 28 14 55 20 2005 host Thu Apr 28 14 59 06 2005 dag Thu Apr 28 14 59 06 2005 Connecting time...

Page 30: ...RJ45 connector with two bi directional RS422 differential circuits A and B The PPS signal is carried on circuit A and the serial packet is connected to the B circuit Pin assignments The 8 pin RJ45 con...

Page 31: ...3 and 6 The DAG can also output a synchronization pulse used when synchronizing two DAG cards without a GPS input Synchronization output is generated on the Out A channel pins 1 and 2 Ethernet crossov...

Page 32: ...ata is captured as a byte stream no byte re ordering is applied Table Table 7 1 shows the generic variable length record timestamp timestamp type flags rlen lctr wlen rlen 16 bytes of record Table 7 1...

Page 33: ...th Total length of the record transferred over PCI bus to storage Lctr loss counter A 16 bit counter recording the number of packets lost since the previous record Records can be lost between the DAG...

Page 34: ...number representing seconds since midnight on the first of January 1970 The high 32 bits contain the integer number of seconds while the lower 32 bits contain the binary fraction of the second This a...

Page 35: ...mestamps continued Example code Here is some example code showing how a 64 bit ERF timestamp erfts can be converted into a struct timeval representation tv unsigned long long lts struct timeval tv lts...

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