EMTRION emSBC-Argon, Hardware Manual

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Hardware Manual: emSTAMP- emSBC-Argon (Rev1)
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Module Pin CPU Pin Name Signal
Direction
(module view )
Termination
101 PB14 SDMMC2_D0 I/O
102 PB15 SDMMC2_D1 I/O
103 PB3 SDMMC2_D2 I/O
104 PB4 SDMMC2_D3 I/O
105 PA8 SDMMC2_D4 I/O
106 PA9 SDMMC2_D5 I/O
107 PE5 SDMMC2_D6 I/O
108 PC7 SDMMC2_D7 I/O
The following table shows the pinout of the SMD-Pads on the bottom side of the emSTAMP-Argon
CPU module:
Module Pin CPU Pin Name Signal
Direction
(module view )
Termination
109
PE4 LTDC_B0 O
110 PG12 LTDC_B1 O
111 PG10 LTDC_B2 O
112 PD10 LTDC_B3 O
113 PI4 LTDC_B4 O
114 PA3 LTDC_B5 O
115 PB8
LTDC_B6
O
116 PD8
LTDC_B7
O
117 PB1
LTDC_G0
O
118 PB0
LTDC_G1
O
119 PH13
LTDC_G2
O
120 PE11
LTDC_G3
O
121 PH15
LTDC_G4
O
122 PI0
LTDC_G5
O
123 PI1
LTDC_G6
O
124 PI2
LTDC_G7
O
125 PH2
LTDC_R0
O
126 PH3
LTDC_R1
O
127 PH8
LTDC_R2
O
128 PH9
LTDC_R3
O
129 PH10
LTDC_R4
O
130 PC0
LTDC_R5
O
131
PH12
LTDC_R6
O
132 PE15
LTDC_R7
O
133 PI10
LTDC_HSYNC
O
134 PI9
LTDC_VSYNC
O
135 PG7
LTDC_CLK
O
136 PE13 LTDC_DE O
137
JTCK-SWCLK JTCK_SWCLK I IPD
138 JTMS-SWDIO JTMS_SWDIO I IPU
139 JTDI JTDI I IPU
140 JTDO-TRACESWO JTDO O IPU
141 NJTRST JTRST# I IPU