7
This will clear the following SC26C92 registers: SRA, SRB, IMR, ISR, OPR, and OPCR. It will also put OP0-OPT into the high state, stop
the counter/timer, and make channel A and B inactive with the TxDA and TxDB outputs in the high state.
After reset OP2-4 default as general purpose outputs. If after reset they have been programmed for another function they may be
programmed to outputs again by programming register OPCR (see data sheets). When these ports are configured as outputs they output
the complement of the data in OPR (an internal register of the SC26C92) which is controlled by the OUTSET and OUTRES ports.
For example, to make OP2 high we must make bit 2 of OPR low (since the complement of OPR is output). A 1 in any of the bits that are
written to the OUTRES port will result in the corresponding bit in OPR being brought low (reset), allowing you to selectively reset any or all
of the bits without affecting the others. The following code does this.
CLR
P5.1
; enable MMIO
MOV
DPH,#OUTRES
; select OUTRES port
MOV
A,#00000100B
; bit 2 of A is set
MOVX
@DPTR,A
; write A to OUTRES, resetting bit 2 of OPR only
...subsequently writing the same value to OUTSET port will make OP2 high:
MOV
DPH,#OUTSET
; select OUTSET port
MOVX
@DPTR,A
; write A to OUTSET, setting bit 2 of OPR only
As shown above, OUTSET works the same as OUTRES except it selectively sets bits in OPR.
The inputs IP0, IP1, IP2, IP3 and IP6 may be programmed to be general purpose inputs; they are unlatched and may be examined by
simply reading the UARTIN port and examining bits 0,1,2,3 and 6. The inputs IP0-IP3 have a unique feature in that they can also detect a
change in state. This is defined as a high-to-low, or low-to-high input transition that lasts longer than 50 uS. When the IPCR port is read,
bits 0-3 will read the same as the corresponding bits in the UARTIN port, and bits 4-7 if set to 1 will indicate a change of state for IP0-IP3
respectively. After the port is read, bits 4-7 are automatically reset.
For more details on SC26C92 input and output, see the SC26C92 data sheets.
ANALOG INPUTS
The 8 channels of 8 bit A/D have a range of 0-5V. The upper end of this range is fine
tuned when the unit is built and may be adjusted using VR1 if it later gets out of spec. The
range defaults to 0-5V but the upper and lower range may be programmed to other values
(within a 0-5V range) by writing to the 80535 special function register DAPR (For more
information, see assembly language drivers and section 3.5 of the SAB 80515/80535
Single-Chip Microcontroller User's Manual included in the appendices)
You may select 1 of 8 channels to read the data from and when the conversion is finished,
read the data from register ADDAT. Below is a simple A/D conversion subroutine:
Analog Input HDR4
1
2
analog channel 0
o o
ANL GND
analog channel 1
o o
ANL GND
analog channel 2
o o
ANL GND
analog channel 3
o o
ANL GND
analog channel 4
o o
ANL GND
analog channel 5
o o
ANL GND
analog channel 6
o o
ANL GND
analog channel 7
o o
ANL GND
ground
o o
ground
+VIN
o o
VCC
19
20
; ADCIN
; Return ACC with the 8 bit A/D conversion from the channel selected by ACC
;
ADCIN:
ANL A,#111B ; ONLY 8 CHANNELS
ANL ADCON,#11000000B ; MODE FOR A/D CONVERSION: SINGLE
ORL ADCON,A ; "OR" IN THE CHANNEL
MOV DAPR,#0 ; START CONV W/NO REF VOLTAGE
JB BSY,$ ; LOOP TILL CONVERTED
MOV ACC,ADDAT ; ACC = CONVERSION
RET
Summary of Contents for MicroPac 535
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