14
Circuit Details
Refer to the schematic diagram, page 16.
The filter circuits of the KAF2 are inserted between the receiver's product detector and AF amp stages. This
is a fairly low-level point in the receive chain, so to maximize signal-to-noise ratio, a very low-noise op-
amp is required (U1, LM837).
U1 has four sections. The first section (U1A) converts the K2's balanced audio path to single-ended to drive
the active band-pass filter. The second and third sections (U1B-C) are 2
nd
-order, multiple-feedback band-
pass filters, which provide approximately constant bandwidth over a center pitch range of 400-800 Hz. The
5% components used in the two stages, in combination with the two center-frequency setting trimmers,
result in gain and bandwidth repeatability on the order of +/- 1 dB. The fourth section of U1 (U1D) inverts
the audio waveform so that both 0-degree and 180-degree signals will be available to drive the balanced
low-pass filter. This preserves balance and common-mode noise rejection when the signal is routed back to
the K2's audio amplifier, which has a differential input.
A passive, elliptic low-pass filter is used at the output of the KAF2, providing rolloff of high-pitch signals
and noise. Shielded inductors and a balanced filter topology are used to prevent noise and hum pickup. The
passive filter contributes no noise of its own and is located after all active filter stages, so it completely
removes even the very small amount of noise generated by the LM837 op-amp.
JFET transistors Q1-Q3 are used as low-noise, low-loss series switching elements for audio signal routing.
For example, in the OFF mode (LPF only), Q1 is turned on (low resistance from source to drain) and Q2-3
are turned off (very high resistance). To turn a JFET on, its gate is set to 6 volts, matching the resting bias
voltage on the source and drain. To turn a JFET off, its gate is set to 0 volts.
U3, the real-time-clock, runs from a 32768.00 Hz crystal. This frequency is divided down to 1 Hz and used
to drive a series of counters whose outputs serve as the time and date registers. D1 and D2 route either 5 V
or 3 V to U3, depending on whether the K2 is turned on. U3 draws on the order of only 4 microamps in
standby mode. Since battery BT1 is rated at 220 mAHr, it should last an estimated 5 years or more.
Microcontroller U2 handles auxBus requests from the main microcontroller (U6 on the Control board),
signal routing, and real-time-clock reading/setting/data formatting. It is normally in sleep mode with its
oscillator disabled, and only wakes up when responding to auxBus messages.
