Chapter 3
Z77H2-A4 USER MANUAL
51
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Chipset OverClocking Configuration
Scroll to this item to view the following screen:
The selection of Perfor-
mance Memory Profiles
which impacts memory siz-
ing behavior.
Main
Advanced Chipset
M.I.B III
Boot Security Exit
+/- : Change Opt.
Enter/Dbl Click : Select
lk
mn
: Select Screen
/Click: Select Item
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC/Right Click: Exit
Row Precharge Time (tRP) (9)
This item specifies Row precharge to Active or Auto-Refresh of the same bank.
Memory Timing Configuration
This item shows the information of Memory Timing.
This item determines the operation of DDR SDRAM memory CAS (colulmn address
strobe). It is recommended that you leave this item at the default value. The 2T
setting requires faster memory that specifically supports this mode.
Memory Multiplier Configuration
This item shows the information of Memory multiplier Configuration.
This item specifies the RAS# to CAS# delay to Rd/Wr command to the same bank.
Row Refresh Cycle Time (tRFC) (74)
This item specifies the row refresh cycle time.
Memory Multiplier Configuration
Performance Memory Profiles Automatic
XMP Profile 1 Not Supported
XMP Profile 2 Not Supported
Memory Timing Configuration
CAS# Latency (tCL) :
9
RAS# to CAS# Delay (tRCD) 9
Row Precharge Time (tRP) 9
RAS# Active Time (tRAS) 24
Write Recovery Time (tWR) 10
Row Refresh Cycle Time (tRFC) 74
Active to Active Delay (tRRD) 4
Write to Read Delay (tWTR) 5
Read CAS# Precharge (tRTP) 5
Four Active Window Delay (tFAW) 20
RAS# Active Time (tRAS) (24)
This item specifies the RAS# active time.
Write Recovery Time (tWR) (10)
This item specifies the write recovery time.
Active to Active Delay (tRRDmin) (4)
This item controls the ACTIVE bank x to ACTIVE bank y in memory clock cycles.
These items show the information of Performance Memory Profiles.
CAS Latency (tCL) (9)
RAS# to CAS# Delay (tRCD) (9)
XMP Profile 1/2 (Not Supported)
