ECS X58B-A, Manual, Page: 45 / 68

39
Using BIOS
* When users disable the item Configure DRAM Timing by SPD, the following
picture will show.
Users can adjust the values according to those labelled on the DIMM
specification to improve the efficiency of the system. In principle, you
need set
the values of tCL (CAS Latency Time), tRAS (Active to Precharge
Delay), tRP (RAS Precharge Time) and tRCD (RAS to CAS Delay).
CMOS Setup Utility - Copyright (C) 1985-2005 American Megatrends, Inc.
M.I.B. (MB Intelligent BIOS)
Help Item
CPU Current Voltage 1.21250V
CPU Voltage Disabled
NB Vcore 1.120 V
IOH Voltage Disabled
CPU VTT 1.184 V
CPU VTT Voltage Disabled
VDIMM 1.456 V
DIMM Voltage Disabled
SB Vcore 1.232 V
SB Voltage Disabled
Current Memory Frequency 1066 Mhz
DRAM Frequency Auto
Configure DRAM Timing by SPD Disabled
DRAM tCL 3
DRAM tRAS 9
DRAM tRP 3
DRAM tRCD 3
DRAM tRFC 15
f
12
12
12
12
12
12
f
F10: Save ESC: Exit +/-/: Value Enter : Select
F9: Optimized Defaults F1:General Help
: Move
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