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Embedded  Solutions  

          Page  6

 

 

Headers and TestPoints

 

 

J6

 and 

J11

 are used to select the VPWR source for position 0 and 1 respectively.  

When the Shunt closes 1-2 – 12V is selected.  With 2-3 closed 5V is selected.  FET’s 
are used to provide a low impedance path from the power supplies to VPWR for each 
position.  Options are in place on the PCB to allow hardwired selections for clients who 
prefer a fixed voltage.  The headers are not installed when the fixed voltage option is in 
place.  With pin 2 open VPWR will be open. 
 

J12

13

, and 

23

 are used to select the bezel grounding option.  1-2 selects AC coupled, 

2-3 selects DC coupled and open is open.  J12 = PCIe Bezel.  J13 = Slot 0.  J23 = Slot 
1. 
 

J1

 is an optional header for SMB connection.  Pin 1 is data and pin 2 is clock.  Both are 

pulled up.  3

rd

 party tools can be used to see the “innards” of the switch.  Usually not 

needed but handy if you are doing development or want to talk through the switch to the 
XMC positions. 
 

TP1

 is an optional JTAG header used to connect to XMC 0.  The pin definitions are in 

the silk.  1: 3.3V, 2: GND, 3: TMS, 4: TDO, 5: TDI, 6: TCK, 7: TRST 
 

J2

 & 

J19

 control the voltage on 33,67 of P2 and P7 respectively when the SCSI 

connector options are selected.  1-2 selects 3.3V and 2-3 selects ground on those pins.  
The shunt and traces are rated for 1A.  Not fuse protected. 
 

J3

 & 

J20

 control the voltage on 34,68 of P2 and P7 respectively when the SCSI 

connector options are selected.  1-2 selects 3.3V and 2-3 selects ground on those pins.  
The shunt and traces are rated for 1A.  Not fuse protected. 
 

P3, 4, 6

 are optional power connectors to allow for added 12V power to be used by the 

PCIe8LXMCX2.  The PCIe gold fingers allow for about 60W of power to be consumed 
by the board across all XMC voltages including power supply losses.   In many cases 
the power budget is more than sufficient.  If your XMC’s require more power please 
request one of the optional power connectors [discrete wire, 4 wire standard PC vert or 
horizontal] to increase the 12V available.  Both 12V entry points are diode coupled to 
prevent the current back-feeding when an external or other supply is added. 
 
P3: 1-2 = gnd, 3-4 = 12V.  P4,6: 1= 12V, 2-3 = gnd. 

 

 

Summary of Contents for PCIe8LXMCX2CB

Page 1: ...57 4793 http www dyneng com sales dyneng com Est 1988 User Manual PCIe8LXMCX2CB PCIe 8 Lane 2 Position XMC Compatible Carrier Connector Bus Version Shown With JN4 full CB 4 fans installed AP power con...

Page 2: ...he product described in this document at any time and without notice Furthermore Dynamic Engineering assumes no liability arising out of the application or use of the device described herein The elect...

Page 3: ...in Assignment 10 XMC Module IO Resistor Selection 11 XMC Module Connector Resistor Selection 13 APPLICATIONS GUIDE 15 Interfacing 15 Construction and Reliability 16 Thermal Considerations 16 WARRANTY...

Page 4: ...sistors are located front and back with almost 0 stub length for the unused feature The connections are impedance controlled and matched length routed as differential pairs 100 ohms A selection table...

Page 5: ...s on plus 12V minus 12V plus 5V plus 3 3V and switch power 1 0V 10A regulator for XMC 3 3V and 5V supplies Shunts for Delayed not Delayed Off Selection switch for VPWR 12V or 5V per XMC Option for ha...

Page 6: ...AG header used to connect to XMC 0 The pin definitions are in the silk 1 3 3V 2 GND 3 TMS 4 TDO 5 TDI 6 TCK 7 TRST J2 J19 control the voltage on 33 67 of P2 and P7 respectively when the SCSI connector...

Page 7: ...ards Resistor options are available to hardwire the selection DipSwitch Settings Switch 1 Global Address Settings Position 1 3 corresponds to XMC0 GA0 2 When closed the signal is 0 When open the signa...

Page 8: ...ded The fan produces 5 CFM in a small area to create a high LFM rating suitable for most cooling requirements The fan used has a relatively low noise rating for quiet operation Position 1 is closest t...

Page 9: ...t corner pin Pin C1 corresponds to the cable wire number 1 for a standard header inserted into the connector on the PCIe8LXMCX2CB The mating parts are available from a number of manufacturers Cables a...

Page 10: ...6 E7 D7 A15 C15 15 49 14N 14P 31 29 C8 C7 A16 C16 16 50 15N 15P 32 30 F8 F7 A17 C17 17 51 16N 16P 35 33 B9 A9 A18 C18 18 52 17N 17P 36 34 E9 D9 A19 C19 19 53 18N 18P 39 37 C10 C9 A20 C20 20 54 19N 19P...

Page 11: ...234 IO1_7N IO0_8P 173 301 365 237 IO1_8P IO0_8N 172 300 364 236 IO1_8N IO0_9P 175 303 367 239 IO1_9P IO0_9N 174 302 366 238 IO1_9N IO0_10P 177 305 369 241 IO1_10P IO0_10N 176 304 368 240 IO1_10N IO0_...

Page 12: ...IO0_29N 214 342 406 278 IO1_29N IO0_30P 217 345 409 281 IO1_30P IO0_30N 216 344 408 280 IO1_30N IO0_31P 219 347 411 283 IO1_31P IO0_31N 218 346 410 282 IO1_31N FIGURE 2 PCIE8LXMCX2CB RESISTOR SELECTI...

Page 13: ...IO0_7N 426 491 554 619 IO1_7N IO0_8P 429 492 557 620 IO1_8P IO0_8N 428 493 556 621 IO1_8N IO0_9P 431 494 559 622 IO1_9P IO0_9N 430 495 558 623 IO1_9N IO0_10P 433 496 561 624 IO1_10P IO0_10N 432 497 56...

Page 14: ...599 662 IO1_29P IO0_29N 470 535 598 663 IO1_29N IO0_30P 473 536 601 664 IO1_30P IO0_30N 472 537 600 665 IO1_30N IO0_31P 475 538 603 666 IO1_31P IO0_31N 474 539 602 667 IO1_31N FIGURE 3 PCIE8LXMCX2CB R...

Page 15: ...t Many BIOS will display the PCI devices found at boot up on a splash screen with the VendorID and CardId for the XMC installed and an interrupt level If the information is not available from the BIOS...

Page 16: ...hole for the IO The XMC Module connectors are keyed and shrouded with Gold plated pins on both plugs and receptacles They are rated at 1 Amp per pin 100 insertion cycles minimum These connectors make...

Page 17: ...ust accompany the return Dynamic Engineering will not be responsible for damages due to improper packaging of returned items For service on Dynamic Engineering Products not purchased directly from Dyn...

Page 18: ...will not require any user intervention Initialization switch selections for VPWR bezel grounding and cable options Interface XMC front bezel via PCIe bracket and User IO connector via DIN or SCSI con...

Page 19: ...nection bus and IO ROHS ROHS compliant parts and process XIO Install Jn6 connectors as well as Jn4 XIOExc Install Jn6 connectors without Jn4 SCSI Install SCSI connectors instead of DIN NC Do not insta...

Page 20: ...html 64 pin ribbon cable to to 64 screw terminal converter with DIN rail mounting DINribn64 http www dyneng com DINribn64 html 64 pin ribbon cable with strain relief 50 2012 0101 XX YY ZZ Substitute...

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