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4

3.  DVC Camera Functional Description

3.1 CCD Sensor:

Light from the scene is brought into focus at the imaging plane of the CCD. An optical block
(optional) filters out the IR component of the light.

The following functions take place within the CCD:

3.1.1 Integration:

During the integration period (1/60 sec.), charges are integrated in the active pixel wells of the
Imaging Area. The amount of charge that is integrated in each active pixel well is proportional to
the illumination received at each active pixel site on the CCD. Anti-blooming pulses during the
horizontal and vertical blanking areas trigger the anti-blooming gates that are an integral part of
the active pixel elements.

3.1.2 Parallel Transfer:

During the Vertical Blanking interval, the entire charge matrix that was integrated in the previous
field  (1/60 sec) is shifted to the opaque storage area of the CCD. This is accomplished by a
series of 242 pulses, each of which causes the charge matrix to shift down by one line. This
process takes approximately 68

µ

sec.

3.1.3 Readout:

In the following field, the charges are transferred from the storage area of the CCD to on-chip
serial shift registers and then sequentially to the detection nodes where they are made available
as signal voltages. Note: While one field is being read out from the Storage Area, the other field
is being integrated in the Imaging Area of the CCD.

3.2 Video Pre-processing:

The low-level video signal voltage from the CCD is fed through a high-speed sample-and-hold
amplifier, clamped (for black reference) and amplified before further video processing. It is in

CCD Sensor

3 Channel 

S/H

3 Channel pre-

amplifier:

Gain

Clam ping

White Balance

Black Balance

3 : 1 

Analog 

multiplexer

Digital Video Amp:

Digital Gain

Digital Offset

Video Processor:

Gain & Offset

Gamma

Sync Insertion

(optional)

AD-10 or AD-08

board:

Analog/Digital 

conversion

TTL to RS-422 

drivers:

single ended TTL 

to parallel, 

differential, RS-

422

Linear Voltage 

Regu lators

Imaging

Area

Storage

Area

Timing and control logic:

Clock generation

Generation of all CCD control signals

Genlock PLL (optional)

Ex posure control

Sensor and Video Board

Sync & Power Board

Analog to Digital Board

RS-170 Output

Processed 
Analog Video

Multiplex ed 
Analog Video

Pre-amp
 Video

CCD
Video

Serial

Parallel

S/H  signals

Clam p

Multiplex  signals

Clock

Clock, Enable Line, Enable Frame, Field 
I d

+12V, -12V, +5V

DIN  Connector
(Power Supply)

DB-37 
connector
(Digital Video)

Digital Video
(8 or 10 bits)

Serial

Driver

Parallel

Driver

Figure 3-1: Digital Camera Block Diagram

Summary of Contents for DigitEyes Series

Page 1: ... for DVC s DigitEyes Cameras Manual Number 86 0001 03 Release Date December 29 1996 DVC Company 7101 Midwood Parkway Austin TX 78736 Phone 512 301 9564 Fax No 512 288 2961 e mail sales dvcco com WWW http www dvcco com ...

Page 2: ...RA OPTIONS AND SPECIAL MODIFICATIONS 11 5 1 TYPICAL MODE CONTROL TABLES 11 5 1 1 N Field Integration Pulse Driven Integration Asynchronous Reset 11 5 1 2 N Field Integration 4 values of N Two speed Electronic Shutter Pulse Driven Integration Asynchronous Reset 12 5 2 ELECTRONIC SHUTTERING MODE 12 5 3 PULSE DRIVEN INTEGRATION MODE 14 5 4 N FIELD INTEGRATION 15 5 5 ASYNCHRONOUS RESET AND GENLOCK 17 ...

Page 3: ...l camera 35 8 2 4 Do I need a frame grabber to use digital cameras 36 8 2 5 How should I go about selecting a frame grabber for my application 36 8 2 6 Do I need to cool the camera 36 8 3 PRODUCT FEATURES 37 8 3 1 What is the single most important reason to buy a DVC camera vs the competition 37 8 3 2 Can you define the term signal to noise ratio 37 8 3 3 How are Signal to Noise Ratio SNR and sens...

Page 4: ...5 4 What is the image format size during electronic shuttering and pulse driven integration 51 8 5 5 Can I use genlock asynchronous reset electronic shuttering simultaneously 51 8 5 6 What is genlock and how does it work 51 8 5 7 What is auto iris and how does it work 52 8 5 8 What is GAMMA it sounds like Greek to me 52 8 5 9 What options are available to control the Digital Video gain and offset ...

Page 5: ...KETCH SHOWING CAMERA BOARDS 43 FIGURE 8 2 VIDEO BOARD ADJUSTMENTS 44 FIGURE 8 3 EXPOSURE CURVE SHOWING THE DYNAMIC RANGE OF THE CAMERA 46 FIGURE 8 4 IMAGING AREA SHOWING PSEUDO INTERLACED OPERATION 47 FIGURE 8 5 ANTI BLOOMING CURVE 49 FIGURE 9 1 POWER SUPPLY CONNECTOR PINOUT DIAGRAM 53 FIGURE 10 1 CAMERA TIMING DIAGRAM 54 FIGURE 11 1 CAMERA SCHEMATIC DIAGRAM 55 FIGURE 12 1 CAMERA MECHANICAL DRAWIN...

Page 6: ...CCD imager has a 755 H X 484 V interlaced image format and has on chip correlated clamp sample hold circuitry that minimizes noise The CCD has a full well of 80 000 electrons and a noise floor of 30 electrons at 25 C It has no dead pixels or blemishes that are found in low end security and surveillance CCD cameras The CCD is physically mounted in a cavity within a high precision opto mechanical pl...

Page 7: ... 05 fc CCD for 100 IRE video Signal to Noise Ratio 62 dB Figure 2 2 TC 245 CCD Spectral Responsivity Curve Texas Instruments 1994 S pectral res pons e in Vis ible region U V res pons e obs erved to 200nm with CCD faceplate removed IR R es pons e obs erved to 1100nm 0 10 20 30 40 50 60 70 80 90 100 W avelength nm W ithout IR F ilter W ith IR F ilter Figure 2 1 Camera Spectral Response ...

Page 8: ...A steady state Clock Rate 14 31818 MHz Synchronization Internal crystal 14 31818 MHz Genlock Optional Reverts to crystal lock w o External Sync 2 5 MECHANICAL Weight without lens 1 lb approx Temperature limits operating 10 C to 50 C Temperature limits storage 30 C to 70 C Dimensions 4 X 3 X 2 Lens mount Industry standard C mount Camera mount 20 threaded hole Digital Video Connector DB 37 female co...

Page 9: ...and then sequentially to the detection nodes where they are made available as signal voltages Note While one field is being read out from the Storage Area the other field is being integrated in the Imaging Area of the CCD 3 2 Video Pre processing The low level video signal voltage from the CCD is fed through a high speed sample and hold amplifier clamped for black reference and amplified before fu...

Page 10: ...s recommended that the cable be terminated in its characteristic impedance of 75Ω at the receiving end the monitor or other receiving device 3 4 Video Digitization The low level video signal voltage from the pre processor is clamped for black reference and amplified on the Sensor Video Board before Analog to Digital conversion on the optional Analog to Digital board The Digital Video Data is latch...

Page 11: ...s High sensitivity unlike Interline Transfer CCDs which have dead spaces that lower sensitivity Solid state reliability with no image burn in residual imaging image distortion lag or microphonics Minimum 100 1 blooming overload ratio with Interlace on 70 dB sensor dynamic range Full well 80 000 electrons Noise equivalent signal 30 electrons typical 20 electrons High photo response uniformity 5 pho...

Page 12: ...ng aliasing The device can also be operated as a 755 H X 242 V non interlaced sensor with significant reduction in the dark signal A gated floating diffusion detection structure with an automatic reset and voltage reference incorporated on chip converts charge to signal voltage The signal is further processed by a low noise state of the art correlated clamp sample and hold circuit A low noise two ...

Page 13: ...e the signal charge is transferred into the storage area There are 29 1 2 columns of elements at the right edge of the image sensing area that are shielded from incident light these elements provide the dark reference used in subsequent video processing circuits to restore the video black level There are also 1 1 2 columns of light shielded elements at the left edge of the image sensing area and t...

Page 14: ...9 Figure 4 3 TC 245 Gate Level Drawing Texas Instruments 1994 ...

Page 15: ...y the sampling transistor Q5 and is stored on the holding capacitor C3 This process is repeated periodically and is correlated to the charge transfer in the registers The correlation is achieved automatically since the same clock lines used in shift registers S2 and S3 for charge transport serve for reset and sample The multiple use of the clock lines significantly reduces the number of signals re...

Page 16: ...options that are ordered Note since the Mode Control 1 MC1 or DB37 pin37 and the Mode Control 0 MC0 or DB37 pin18 are often used for the external analog video gain and offset control voltages units that have these external options selected are limited in the number of exposure control options that are provided In some cases a special auxillary connector may be provided on the camera side panel to ...

Page 17: ...t the beginning of the Vertical Blanking Interval the CCD is flushed by means of two charge transfers This takes approximately 140µsec After the two clearing transfers the Integration Period begins Before the end of the Vertical Blanking Interval however a readout transfer takes place The period between the two clearing transfers and the third readout transfer is the Integration Period it s durati...

Page 18: ...ering is used to stop motion only one field or half the normal vertical resolution per integration period is usable If shuttering is used for exposure control and the field of view is static relative to the 1 60 sec between successive exposures full vertical resolution is available Both the Genlock and the Asynchronous Reset options have been found to work successfully with the shutter mode althou...

Page 19: ...ec N 1 1 60 sec N 1 INT N 2 1 60 sec Video Sync Readout N EVEN FIELD Integrated Image INTEGRATION PERIOD DURATION OF PULSE CCD FLUSH PERIOD TRANSFER PULSE CCD FLUSH PERIOD Reset Video Blanked Enable Frame Enable Frame Enable Frame Enable Frame Enable Line Enable Line Enable Line Enable Line Video Blanked Figure 5 3 Pulse Driven Integration Mode The CCD is flushed by means of two quick successive t...

Page 20: ...ers As soon as the CCD is flushed the active integration period begins This period lasts as long as the RESET pulse is LOW During this period the Enable Frame and Enable Line signals are NOT asserted since no active video is being generated while the integration takes place 5 When the RESET pulse transitions LOW to HIGH the final readout transfer takes place The timing chip is also reset to line 6...

Page 21: ...ted only at the end of the N Field integration period before the readout field there is no image generated by the camera except during the one Readout field due to each INTEGRATION sequence Therefore the video output is blanked until the next Readout field Note 3 There is no theoretical upper limit to the integration period In reality the upper limit is determined by the amount of noise that can b...

Page 22: ...alling edge the duration of the RESET pulse is not significant and resets the Vertical Counter to the top of the ODD field in the Camera A frame transfer and normal readout of the interrupted field ensue and a new integration on the CCD commences If no further RESETS occur normal operation is resumed It is the responsibility of the application to ensure that the RESET is synchronized properly with...

Page 23: ...enerate partial fields at a fast rep rate This mode may be useful for some Motion Analysis applications 5 5 3 Genlock Mode The camera operates in the standard mode until a CSYNC or ANALOG VIDEO signal is fed into the genlock input Note this input is available on cameras specially modified for the GENLOCK option Within a few milli seconds the Phase Locked Loop within the camera locks to the incomin...

Page 24: ...ower is derived from the camera AUX POWER pin DB 37 pin 36 no external power supply is needed A micrometer knob with a locking mechanism allows the user to accurately calibrate the application and lock in an optimum gain setting for the application s light level The range of operation of the External Gain function is approximately 26 dB from a maximum of 43 dB to a minimum of 17 dB It has a linear...

Page 25: ...cation and lock in an optimum offset setting for the application s light level The range of operation of the External Offset function is 0 to 14 IRE units from a dial setting of 0 00 to 10 00 respectively It has a linear response see curve below 5 6 3 1 Default The camera defaults to max offset if the external black box is not plugged into a camera that has been modified for External Offset Contro...

Page 26: ...negative slope is real and NOT a typo 5 6 4 1 Gain vs Noise The increase of gain increases the noise that is present on the video signal the signal to noise ratio of the analog video signal is considerably degraded in low light high gain situations However some scientific applications benefit greatly from this function Since DVC cameras have much higher signal to noise ratios than average analog v...

Page 27: ...ve below 5 6 5 1 Default The camera defaults to max offset if the external black box is not plugged into a camera that has been modified for External Offset Control 5 6 5 2 Linear Range of Control Care should be taken to keep the control voltage in the linear range between 2V and 3 125V outside this range the offset defaults to certain preset levels in a discontinuous manner 5 6 5 3 RS 170 Pedesta...

Page 28: ...tion As the scene illumination is decreased the Auto Iris lens opens wider until it reaches it s maximum after that any decrease in scene illumination results in an increase of AGC gain 5 6 6 2 AGC and Noise The increase of AGC gain increases the noise that is present on the video signal the signal to noise ratio of the analog video signal is considerably degraded in low light high gain situations...

Page 29: ...d sometimes an eight position knob switch is also installed on the remote control box This allows mode selection via the Remote Control box In other cases a Y cable may be needed to connect a camera simultaneously to a remote control box AND the digital port of a Frame Grabber or Image Processor within a PC Cable with DB 37 male connector Strain Relief Offset adjust 10 turn pot with precision lock...

Page 30: ...B6 10 VIDEO DB5 29 VIDEO DB5 11 VIDEO DB4 30 VIDEO DB4 12 VIDEO DB3 31 VIDEO DB3 13 VIDEO DB2 32 VIDEO DB2 14 VIDEO DB1 33 VIDEO DB1 15 VIDEO DB0 MSB 34 VIDEO DB0 MSB 16 GROUND 35 GROUND 17 RESET 36 5VOLT AUX POWER OUT 18 MODE CONTROL 0 Or Offset Control 37 MODE CONTROL 1 Or Gain Control 19 MODE CONTROL 2 Table 5 1 Y Cable Pinout of camera side DB 37 connector marked C The splitter connects to the...

Page 31: ...Y Cable Pinout of Remote box DB 37 connector marked R 2 The Digital Signals branch PIN SIGNAL NAME PIN SIGNAL NAME 1 PIXEL CLOCK 20 PIXEL CLOCK 2 LINE DATA VALID 21 LINE DATA VALID 3 FRAME DATA VALID 22 FRAME DATA VALID 4 COMPOSITE SYNC 23 COMPOSITE SYNC 5 FIELD INDEX 24 FIELD INDEX 6 VIDEO DB9 LSB FOR DVC 10 25 VIDEO DB9 LSB FOR DVC 10 7 VIDEO DB8 26 VIDEO DB8 8 VIDEO DB7 LSB FOR DVC 08 27 VIDEO ...

Page 32: ...era response to scene illumination if the camera is connected to an Image Processor for measurement applications this is usually desired However as seen in the above figure if the gamma setting of the camera is 1 0 then the monitor has a non linear concave exponential response to scene illumination Details in the darker part of an image will not show up with as much contrast as details in the brig...

Page 33: ...sponse of the CCD to measure the relative brightness of objects within the field of view After processing a Look up Table may be used in the Image Processor prior to viewing the processed image on a monitor Gamma 0 45 This is used when the output of the camera is connected directly to a monitor without any image processor This setting leads to an overall system response that is linear However due ...

Page 34: ... control Access to the internal analog offset control potentiometer is provided via a 1 8 hole in the camera cover The range of operation is approximately 0 15 IRE It has a linear response Note 1 The RS 170 standard specifies a setup or pedestal of 7 5 IRE units This is obtained approximately half way through the adjustment range actual settings will vary slightly from unit to unit The analog offs...

Page 35: ...rd 0 45 or 1 0 select switch The range of operation is from 0 45 to 1 0 Unity gamma A Gamma value of 0 45 is obtained by adjusting the potentiometer to the one extreme position unity gamma is obtained by adjusting the potentiometer to the other extreme position Values between 0 45 and 1 0 are obtained in between the two extreme positions 6 DVC Camera Image Processor Compatibility Note The Analog V...

Page 36: ...rd Available from DVC Bitflow Raptor VL Available from DVC 6 4 VME Manufacturer Board name no Comments Status Imaging Technology IMA DIG Available from DVC DataCube MV 200 Available from DVC 6 5 SUN S BUS Manufacturer Board name no Comments Status EDT SDV Available from DVC Active Imaging Snapper BIB Available from DVC 6 6 SGI Digital Manufacturer Board name no Comments Status SGI O2 DVC can build...

Page 37: ... 0A Ordering Example Mfr Bits Synch options Elect Shutter N Field Integ Pulse Driven Integ Optical Filter Analog Gain Analog Offset Access Ports Analog Gamma DVC XX S E N D I G O P Y 0A 0 0 0 0 0 1 1 0 1 Example Model no DVC 0A 0000 01101 with remote gain offset box Typical digital camera example To order a 10 Bit digital camera with asynchronous reset pulse driven integration access ports for ana...

Page 38: ...illance cameras with imprecise optical mounts Elimination of pixel jitter with digital output Compatible with Image Processors for a variety of platforms including IBM PC PCI Mac Nubus SGI Digital VME S BUS Rugged construction suitable for challenging OEM environments Board level cameras are available Uses industry standard C mount lenses 8 1 2 What are the differences between the DVC 0A DVC 08 an...

Page 39: ...uses the AD 08 eight bit board the DVC 10 board set uses the AD 10 ten bit board The dimensions of both AD 08 and AD 10 boards are 3 X 1 5 the dimensions of the combined board set using all three boards DVC 08 or DVC 10 models is 3 X 4 X 1 5 An optical plate is also available with a C mount lens adaptor for all three board sets This is intended for OEM applications in which the camera electronics ...

Page 40: ...uld have noise mixed into it prior to digitization in the Image Processor s typically noisy digital environment Even if the Image Processor is well designed it derives its power from the computer bus which could be a significant source of noise The benefits of using a high end camera and a well designed Image Processor board could easily be lost by adding noise from the computer bus or from anothe...

Page 41: ...all Image Processors are created alike Some are better at image capture and display others offer better number crunching 2 Choose the platform or the processor bus Sometimes this can be a decision based on experience or familiarity with one platform over others 3 Consult the List of Compatible Image Processors 8 2 6 Do I need to cool the camera With a signal to noise ratio of 62 dB and an equivale...

Page 42: ...faucet a few drops always leak through and get collected in the bucket the CCD charge site The random variation in the dark current electrons contribute significantly to the noise in the video signal this shows up as snow in the image on a monitor The ratio of the 100 IRE signal and the 0 32 IRE noise is the signal to noise ratio In this example not a DVC Camera the SNR is 100 IRE 0 32 IRE 316 The...

Page 43: ...mes to sensitivity less is better If you increase the amount of video gain in a camera you can increase the sensitivity By increasing the gain it takes less light to create a 100 IRE signal more sensitivity Since most video monitors saturate beyond 100 IRE it is the maximum usable signal Unfortunately by increasing the gain for the signal you also increase the gain for the noise usually by the sam...

Page 44: ...tio of the DVC camera In order to achieve the same sensitivity in the competitor s cameras the gain would have to be increased significantly this would lead to a decreased signal to noise ratio more snow in the image Now turn the scene illumination down use Neutral Density or ND filters if you can keep in mind that ND filters are calibrated on a logarithmic scale so a ND 2 0 transmits 1 100th of t...

Page 45: ...om the above examples it can be inferred that in order to have a system that is true 8 bits the SNR of the video signal to be digitized must be 50 dB Note this SNR relates to the signal AT the Analog to Digital converter of the Image Processor not at the output of the camera The average security and surveillance analog camera has 50 dB at the camera output By the time the video is processed in the...

Page 46: ...veillance cameras use inexpensive rubber tipped set screws to hold the C Mount ring and thus set the back focus distance While this works well for security and surveillance applications it is not recommended for high end image processing applications In order to achieve opto mechanical stability and repeatability a different approach was taken in the design of the opto mechanical sub system of the...

Page 47: ...f as a single piece Note The following steps are NOT required for normal access to camera adjustments 8 3 11 2 Removal of Connector Side Panel 1 Using a 3 16 nut driver remove the two hex nuts that hold the DB 37 connector to the connector side panel 2 Using a suitable wrench remove the hex nut and lock washer holding the BNC connector to the panel 3 Using a 1 16 hex socket driver remove the 4 40 ...

Page 48: ...near the socket identifies pin 1 of the socket Note Matching pin 1 of the CCD sensor to pin 1 of the socket on the video board is very important during the re assembly process Identify the potentiometers and switches in the camera see next question 8 3 12 What user adjustable controls are available within the camera 8 3 12 1 Sync and Power Board There are no user adjustable controls on the sync bo...

Page 49: ...iometers if desired NOTE THIS SHOULD NOT BE ATTEMPTED WITHOUT USING A CALIBRATED LIGHT SOURCE AND CALIBRATED OPTICS 5 INTERLACE ADJUSTMENT Focus the camera on a suitable target containing diagonal lines with approximately 50 video output Setting S2 a three position switch to the full CCW position will create a non interlaced image diagonal lines appear jagged vertical resolution is halved Setting ...

Page 50: ...nsfer CCDs less sensitive than their frame transfer counterparts The smaller optical format CCDs 1 3 and more recently 1 4 formats have even smaller pixel sizes and consequently lower sensitivities The smaller formats are cheaper to produce and are quite usable for security and surveillance cameras but are not suitable for scientific work 8 4 3 3 Full Well capacity The smaller size of the Interlin...

Page 51: ...the above graph as Vuse the CCD output voltage which will result in 100 IRE units at the output This is a camera design parameter Vuse can be moved up the saturation curve by decreasing the camera gain and can be moved down the saturation curve by increasing the camera gain Vn the noise floor typically 0 08 to 0 12 mV is a fixed parameter for a given temperature The ratio of Vuse Vn and therefore ...

Page 52: ...are 755 H X 242 V the process of pseudo interlacing creates an effective matrix of 755 H X 484 V 8 4 6 What is meant by pseudo interlaced operation The effective vertical resolution of the CCD is doubled by means of a process called pseudo interlacing In this process the charge collection area represented by each pixel is electronically shifted vertically from field to field by half of the pixel h...

Page 53: ...ution In Image Processing applications the frame storage memory must be designed in a way that allows the writing of odd numbered rows during the ODD field and the even numbered rows during the EVEN field The FIELD INDEX signal HIGH during the EVEN field is provided to simplify the addressing of the frame storage memory 8 4 7 Can the pseudo interlaced operation be disabled In applications where a ...

Page 54: ... the charge site is saturated and can hold no more charge Continuing with the buckets analogy if the rate at which a bucket is filled with water is decreased significantly after it is half full then it takes a lot more water to fill it If several holes are made in the side of a bucket half way up the rate at which the bucket is filled decreases significantly once it is half full For a CCD charge s...

Page 55: ...mera difficult to use in most applications Note this is NOT a user adjustment in the camera Please call DVC to request more information on this modification 8 4 10 What is meant by integration time Integration time is defined as the duration that charge is allowed to accumulate in the charge sites of the CCD 8 4 11 What is the integration time in the standard mode of operation The standard mode of...

Page 56: ...od the video timing is usually disturbed 8 5 3 Do I need a frame grabber for non standard integration modes For the Electronic Shuttering mode the image raster on a monitor is quite stable A frame grabber may be used but is not mandatory For the Pulse driven Integration Mode a frame grabber is usually mandatory 8 5 4 What is the image format size during electronic shuttering and pulse driven integ...

Page 57: ...value over a range of scene illumination Once the auto iris lens is wide open decreasing the scene illumination has no further effect on the auto iris lens Typically the AGC Circuit takes over at this point The two circuits work in tandem to increase the effective dynamic range of the camera 8 5 8 What is GAMMA it sounds like Greek to me See section 5 9 for details 8 5 9 What options are available...

Page 58: ... DB5 29 VIDEO DB5 11 VIDEO DB4 30 VIDEO DB4 12 VIDEO DB3 31 VIDEO DB3 13 VIDEO DB2 32 VIDEO DB2 14 VIDEO DB1 33 VIDEO DB1 15 VIDEO DB0 MSB 34 VIDEO DB0 MSB 16 GROUND 35 GROUND 17 RESET 36 5VOLT AUX POWER OUT 18 MODE CONTROL 0 Or Offset Control 37 MODE CONTROL 1 Or Gain Control 19 MODE CONTROL 2 9 2 Pin assignments for the Power Supply Connector Table 9 2 Power Supply Connector 5 pin DIN PIN SIGNAL...

Page 59: ...S 33 33 mS 1 INTERLACED TV FRAME 518 519 520 521 522 523 524 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VSYNC CSYNC EQ VS EQ 1H LINE DATA 1ST VALID ACTIVE LINE ODD FIELD DETAIL SHOWN IN A FRAME DATA NOTE FRAME DATA VALID IS LOW FOR THE FIRST 20 LINES IN BOTH FIELDS VERTICAL BLANKING INTERVALS VALID THE ODD FIELD IS SHOWN HERE THE EVEN FIELD HAS BEEN OMITTED FOR CL...

Page 60: ...0 DB4 GND 22 22 9 S H2 S3 9 DB3 12 31 DB3 23 23 GND 10 GND GND 10 DB2 13 32 DB2 D7 24 24 11 S H1 S2 11 DB1 14 33 DB1 25 25 D8 12 GND GND 12 DB0 15 34 DB0 GND 26 26 S1 13 GND 16 35 GND 27 27 GND GND 14 RESET 17 36 5V D9 28 28 T 15 MC0 18 37 MC1 29 29 CLOCK GND 16 MC2 19 GND 30 30 31 31 GND NC 32 32 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 J3 J4 J4 J2 J1 NC 1 1 1 1 GND 2 2 2 2 D VIDE...

Page 61: ...56 12 Appendix D Camera Mechanical Drawings Figure 12 1 Camera Mechanical Drawings ...

Page 62: ...57 13 Appendix E Camera Performance Data VM 700A plots Figure 13 1 Camera Noise Spectrum Min Gain Bandwidth 10kHz to full ...

Page 63: ...58 Figure 13 2 Camera Noise Spectrum Min Gain Bandwidth 10kHz to 4 2MHz ...

Page 64: ...59 Figure 13 3 Camera Noise Spectrum Max Gain Bandwidth 100kHz to 4 2Mhz ...

Page 65: ...60 Figure 13 4 Camera Noise Spectrum Max Gain Bandwidth 10kHz to full ...

Page 66: ...r does the warranty extend to DVC manufactured equipment that is repaired or altered by anyone other than DVC or those authorized by DVC in writing Products manufactured by other companies but re sold by DVC such as lenses optical and electro optical assemblies power supplies cables image processor boards and software are warranted by the original manufacturer This warranty is in lieu of all other...

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