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Summary of Contents for PIM-TB10

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Page 2: ...10 MHZ TURBO MAINBOARD USER S MANUAL s IBM PC PC XT PC AT ARE REGISTERED TRADE MARKS OF INTERNATIONAL BUSINESS MACHINES CORP ...

Page 3: ...Memory RAM ROM chips installation 4 1 RAM chips installation 4 2 ROM chips instrallation CHAPTER 1 THE SYSTEM BOARD 1 1 Introduction The 10MHz TURBO system board fits horizontally in the base of the system unit and is approximately 8Yzx 12 inches_ It is a double sided P C B DC power and a signal from the power supply enter the board through two six pin connectors Other connectors on the board are ...

Page 4: ...rating at 10 MHZ called Turbo mode the frequency is derived from 30 MHZ 2 OMA Three of the four DMA channels are available on the I O bus and support high speed data transfers betwt 3n I O devices and memory without processor intervention The fourth DMA chan nel is programmed to refresh the system dynamic memory Th is is done by programing a channel of the timer counter device to periodically requ...

Page 5: ...rate a wavefrom to the speaker 3 the clock input to the timer counter can be modulated with a program controlled I O register bit All three methods may be performed simul taneously 1 2 Expansion I O Channel The I O channel is an extension of the 8088 microprocessor bus It is however demultiplexed repowered and enhanced by the addition of interrupts and Direct Memory Access DMA functions The I O ch...

Page 6: ...ock with a 70 ns period 14 31818 MHz It has a 50 duty cycle CLK System Clock It is divide by three of the oscil lator and has a period of 210 ns 4 77 MHz The clock has a 33 duty cycle RESET This line is used to reset or initialize system logic upon power up or during a low line voltage outage This signal is synchronized to the falling edge of clock and is active high AO A19 Address Bits 0 to 19 Th...

Page 7: ...o 7 These lines are used to signal the processor that a I O device requires attention They are prioritized with IRQ2 as the highest priority and tR07 as the lowest An Interrupt Request are gener 8 ated by raising an IRO lin low to high and holding it high until it was acknowledged by the processor interrupt service routine lOR I O Read Command This command line instructs an I O device to drive its...

Page 8: ...ither read from or write to expansion slot J8 Connectors J1 through J8 are tied together at this pin but the system board should be driven by an open collector device The following voltages are available on the system board I O channel 10 T Vdc 5 located on 2 connector pins 5 Vdc iO located on 1 connector pin 12 Vdc 5 located on 1 connector pin 12 Vdc 10 located on 1 connector pin GND Ground locat...

Page 9: ...No 2 Use NEC 70108 10 to enable speed up to 340 faster than normal XT 12 2 2 To Obtain Turbo Mode at 10 MHZ The system board SLlports both software switch as well as hardware switch to allow transaction from Normal mode 4 77 MHZ to Turbo mode 10 MHZ and software switch hardware switch can be used at the same time to select each of them by jumper is not necessary AI Software Switch Software switch ...

Page 10: ...hed in JP6 i shorted 2 If you use software switch and hardware switch at the same time which means you use tnese two ch mge methods exchange able the cursor on the screen display does not indicate the exact execution mode any more Because cursor does not change by hard ware switch you mix these two changes methods then the cursor is confused At this time the Turbo LED is the only way that you can ...

Page 11: ...und 3 5 Vdc P2 4 5 Vdc 5 5 Vdc 6 5 Vdc 16 B Speaker Connector JP1 The speaker connector is a 2 pin keyed 90 degr e The pin assignments as following Pin I Function 1 Data out 2 5 Vec I C Keyboard Connector JP2 The keyboard connector is a 5 pin gO degree Printed Circuit Board PCB mounting DIN connector The pin assignments as following Pin Assignments 1 KeyboGlrd clock 2 Keyboard data 3 Keyboard rese...

Page 12: ...the system board Generally the memory switch is useless now Function Position 1 Normal operation off 2 Use for 8087 2 co proc8 Sor 3 4 Amount of memory on system board 5 6 Type of display adapter 7 8 Number of 5 inch diskette drives 18 Switch SW1 1 OFF NORMAL OPERATION 2 ON W O 8087 2 co processor 2 0 OFF W 8087 2 co processor Memory Switch Settings 3 OFF 4 ON 128K MEMORY INSTALLED 3 ON 4 OFF 192K...

Page 13: ...89 through U56 BANK 2 is made up of 2 pieces of 4464 in U63 U59 1 piece of 4164 in U55 BANK 3 is made up of 2 pieces of 4464 in U72 U67 1 piece of 4164 in U76 4164 in BAN K 2 and BAN K 3 is used for parity checking 4 potions of memory configuration can be installed on board FOllow the instructions below for proper installation Option RAM chi on RAM chi on RAM chi on RAM chi on B nk 1 B nk 2 B nk3 ...

Page 14: ...I i ijl l C B u n l ftl I I ile tlll l le1 IU l B UA ...

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