Award BIOS Setup Guide
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IDE Primary Master PIO/IDE Primary Slave PIO/IDE Secondary Master PIO/IDE
Secondary Slave PIO: Available selection are “Auto”, “Mode 0”, “Mode 1”, “Mode 2”, “Mode
3” and “Mode 4”. To choose “Auto”, the system BIOS will scan the IDE device and decide
which mode of the device is. Otherwise the user should key in the mode of the device to the
corresponding field.
Some harddisks cannot work properly with its corresponding timing, please set a slower
timing.
IDE Primary Master UDMA/IDE Primary Slave UDMA/IDE Secondary Master
UDMA/IDE Secondary Slave UDMA: Available selection are “Auto” or “Disabled”. To
choose “Auto”, the system BIOS will scan the IDE device and decide Ultra DMA supported or
not.
Init Display First: To select priority of initialization the PCI display card or the AGP display
card.
Onboard FDD Controller: Choose Enabled or Disabled. Enabled allows onboard Floppy Drive
Controller to be functioned, otherwise the users should use other sources.
Onboard Serial Port 1: Choose Auto, Disabled, 3F8/IRQ4, 2F8/IRQ3, 3E8/IRQ4 and
2E8/IRQ3. While choosing proper I/O Address/IRQ, be sure not to cause Address conflict with
other I/O devices. The default setting is 3F8/IRQ4.
Onboard Serial Port 2: Choose Auto, Disabled, 3F8/IRQ4, 2F8/IRQ3, 3E8/IRQ4 and
2E8/IRQ3. While choosing proper I/O Address/IRQ, be sure not to cause Address conflict with
other I/O device. The default setting is 2F8/IRQ3.
UART2 Mode: Available selection are “Normal”, “IrDA” and “ASKIR”.
Onboard Parallel Port: Choose None or with four different I/O Address and corresponding
IRQx. While choosing proper I/O Address, be sure not to cause Address conflict with other I/O
devices.
Parallel Port Mode: Choose SPP, EPP, ECP, ECP+EPP Mode. Make proper selection with the
attached printer port device.
ECP Mode Use DMA: Choose “1” or “3” to select the DMA channel used for the ECP device.
This item is shown if the Onboard Parallel Mode is chosen as “ECP” or “ECP/EPP” option.
ECP Mode Select: Choose “EPP1.7” or “EPP1.9”, which is used to configure the EPP using
either EPP1.7 or 1.9 timing specification. This item is shown if the Parallel Mode is chosen as
“EPP” or “ECP+EPP” option.
Summary of Contents for PAM-0052V
Page 8: ...Chapter 1 4 ...
Page 16: ...Chapter 2 12 2 9 JP6 CLEAR CMOS DATA 1 Normal Mode Fig 4a 2 Reset Content of RTC Fig 4b ...
Page 18: ...Chapter 2 14 ...
Page 40: ...Chapter 4 36 ...