System Overview
96M4321o
User’s Manual
1-1
Chapter 1
System Overview
1.1 Introduction
PICMG organization published PICMG 1.3 specification in late year 2005 which
adopts PCI Express as external I/O expansion interface. The advanced PCI Express
Technology’s throughput balanced the modern extreme computing power that
makes the system much more powerful.
96M4321o
, the PICMG 1.3 SHB (Single Host Board) supports Intel® Core 2
Duo processor that based on Intel® innovated Core Microarchitecture. The
attractive processor does not only posses amazing parallel computing power but
also generates 65W TDP (Thermal Design Power). That makes the system more
powerful and reliable with dual-core processor with smaller and quieter cooling fan.
The SHB was empowered by Intel® Q965 & ICH8DO chipset. The Q965 embedded
Graphics Media Adapter 3000 is the 4
th
generation Intel integrated graphics
controller that supports DirectX 9.0, Shader model 2.0, 256MB of video memory.
More than that, user could utilize even higher-end, the latest PCI Express x16
interface graphics card via backplane.
To meet bandwidth of storage and expansion cards requirement, the
96M4321o
was designed flexible with four PCI Express lanes via backplane.
Those four PCI Express lanes could be four PCI Express x1 links or one PCI Express
x4 link. Four PCI Express x1 links configuration can support more PCI Express x1
devices via backplane and one PCI Express x4 link configuration can support RAID
card or special add-on cards such as image processing board. In addition, the
flexible configuration can be leveraged with bridge on backplane to support more
PCI or PCI-X slots that benefits industries with legacy support.
Advanced Management Technology (AMT) is feature that
96M4321o
equipped. This technology provides remote access capability via Intel® Gigabit
Ethernet controller. With software from 3
rd
party, the new technology allows MIS
or user to monitor system status and help the client to recover failure system.
Beside that, the hardware and software information can be gathering by 3
rd
party
software then storage in SPI interface EEPROM. Therefore, asset management
could be done at the same time.
