PI7C9X2G304EL
Page 36 of 90
September 2017
Document Number DS39931 Rev 2-2
© Diodes Incorporated
PI7C9X2G304EL
6.2 SMBus INTERFACE
The PI7C9X2G304EL provides the System Management Bus (SMBus), a two-wire interface through which a
simple device can communicate with the rest of the system. The SMBus interface on the PI7C9X2G304EL is a
bi-directional slave interface. It can receive data from the SMBus master or send data to the master. The interface
allows full access to the configuration registers. A SMBus master, such as the processor or other SMBus devices,
can read or write to every RW configuration register (read/write register). In addition, the RO and HwInt registers
(read-only and hardware initialized registers) that can be auto-loaded by the EEPROM interface can also be read
and written by the SMBus interface. This feature allows increases in the system expandability and flexibility in
system implementation.
Figure 6-1 SMBus Architecture Implementation on PI7C9X2G304EL
Pericom PCIe
Packet Switch
SMBCLK
SMBDATA
Processor
(SMBus Master)
Other SMBus
Devices
The SMBus interface on the PI7C9X2G304EL consists of one SMBus clock pin (SMBCLK), a SMBus data pin
(SMBDATA), and 3 SMBus address pins (GPIO[5:7]). The SMBus clock pin provides or receives the clock signal.
The SMBus data pin facilitates the data transmission and reception. Both of the clock and data pins are
bi-directional. The SMBus address pins determine the address to which the PI7C9X2G304EL responds to.
The SMBus address pins generate addresses according to the following table:
Table 6-1 SMBus Address Pin Configuration
BIT
SMBus Address
0
GPIO[5]
1
GPIO[6]
2
GPIO[7]
3
1
4
0
5
1
6
1
