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Basys2™ FPGA Board Reference Manual 

 

 

Copyright Digilent, Inc. All rights reserved. 

Other product and company names mentioned may be trademarks of their respective owners.

 

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The keyboard sends data to the host in 11-bit words that contain a ‘0’ start bit, followed by 8-bits of scan code (LSB 
first), followed by an odd parity bit and terminated with a ‘1’ stop bit. The keyboard generates 11 clock transitions 
(at around 20 - 30KHz) when the data is sent, and data is valid on the falling edge of the clock. 

5.2  Mouse 

The mouse outputs a clock and data signal when it is moved; otherwise, these signals remain at logic ‘1’. Each time 
the mouse is moved, three 11-bit words are sent from the mouse to the host device. Each of the 11-bit words 
contains a ‘0’ start bit, followed by 8 bits of data (LSB first), followed by an odd parity bit, and terminated with a ‘1’ 
stop bit. Thus, each data transmission contains 33 bits, where bits 0, 11, and 22 are ‘0’ start bits, and bits 11, 21, 
and 33 are ‘1’ stop bits. The three 8-bit data fields contain movement data as shown in the figure above. Data is 
valid at the falling edge of the clock, and the clock period is 20 to 30KHz.  

The mouse assumes a relative coordinate system wherein moving the mouse to the right generates a positive 
number in the X field, and moving to the left generates a negative number. Likewise, moving the mouse up 
generates a positive number in the Y field, and moving down represents a negative number (the XS and YS bits in 
the status byte are the sign bits – a ‘1’ indicates a negative number). The magnitude of the X and Y numbers 
represent the rate of mouse movement – the larger the number, the faster the mouse is moving (the XV and YV 
bits in the status byte are movement overflow indicators – a ‘1’ means overflow has occurred). If the mouse moves 
continuously, the 33-bit transmissions are repeated every 50ms or so. The L and R fields in the status byte indicate 
Left and Right button presses (a ‘1’ indicates the button is being pressed). 

 

 

ESC

76

` ~
0E

TAB

0D

Caps Lock

58

Shift

12

Ctrl

14

1 !
16

2 @

1E

3 #

26

4 $

25

5 %

2E

Q

15

W

1D

E

24

R

2D

T

2C

A

1C

S

1B

D

23

F

2B

G

34

Z

1Z

X

22

C

21

V

2A

B

32

6 ^

36

7 &

3D

8 *
3E

9 (
46

0 )
45

- _
4E

= +

55

BackSpace

66

Y

35

U

3C

I

43

O

44

P

4D

[ {

54

] }

5B

\ |

5D

H

33

J

3B

K

42

L

4B

; :

4C

' "

52

Enter

5A

N

31

M

3A

, <
41

> .
49

/ ?

4A

Shift

59

Alt
11

Space

29

Alt

E0 11

Ctrl

E0 14

F1
05

F2
06

F3
04

F4

0C

F5
03

F6
0B

F7
83

F8
0A

F9
01

F10

09

F11

78

F12

07

E0 75

E0 74

E0 6B

E0 72

 

Figure 11. Keyboard scan codes. 

L

R

0

1 XS YS XY YY P

X0 X1 X2 X3 X4 X5 X6 X7

P

Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 P

1

0

1

0

0

1

1

Idle state

Start bit

Mouse status byte

X direction byte

Y direction byte

Stop bit

Start bit

Stop bit

Idle state

Stop bit

Start bit

 

Figure 12. Mouse data format. 

Summary of Contents for Basys 2

Page 1: ...protected against ESD damage and short circuits ensuring a long operating life in any environment The Basys 2 board works seamlessly with all versions of the Xilinx ISE tools including the free WebPack It ships with a USB cable that provides power and a programming interface so no other power supplies or programming cables are required The Basys 2 board can draw power and be programmed via its on ...

Page 2: ...PGA Total board current is dependent on FPGA configuration clock frequency and external connections In test circuits with roughly 20K gates routed a 50MHz clock source and all LEDs illuminated about 100mA of current is drawn from the 1 2V supply 50mA from the 2 5V supply and 50mA from the 3 3V supply Required current will increase if larger circuits are configured in the FPGA or if peripheral boar...

Page 3: ... JP4 Initially this jumper is not loaded and must be soldered in place A socket for a second oscillator is provided at IC6 the IC6 socket can accommodate any 3 3V CMOS oscillator in a half size DIP package The primary and secondary oscillators are connected to global clock input pins at pin B8 and pin M6 respectively Both clock inputs can drive the clock synthesizer DLL on the Spartan 3E allowing ...

Page 4: ...LED segments and leaving the others dark Of these 128 possible patterns the ten corresponding to the decimal digits are the most useful The anodes of the seven LEDs forming each digit are tied together into one common anode circuit node but the LED cathodes remain separate The common anode signals are available as four digit enable input signals to the 4 digit display The cathodes of similar segme...

Page 5: ...n segment controller 5 PS 2 Port The 6 pin mini DIN connector can accommodate a PS 2 mouse or keyboard The PS 2 connector is supplied with 5VDC Both the mouse and keyboard use a two wire serial bus clock and data to communicate with a host device Both use 11 bit words that include a start stop and odd parity bit but the data packets are organized differently and the keyboard interface allows bi di...

Page 6: ... send data to the keyboard Below is a short list of some common commands a host might send ED Set Num Lock Caps Lock and Scroll Lock LEDs Keyboard returns FA after receiving ED then host sends a byte to set LED status Bit 0 sets Scroll Lock bit 1 sets Num Lock and Bit 2 sets Caps lock Bits 3 to 7 are ignored EE Echo test Keyboard returns EE after receiving EE F3 Set scan code repeat rate Keyboard ...

Page 7: ... a positive number in the X field and moving to the left generates a negative number Likewise moving the mouse up generates a positive number in the Y field and moving down represents a negative number the XS and YS bits in the status byte are the sign bits a 1 indicates a negative number The magnitude of the X and Y numbers represent the rate of mouse movement the larger the number the faster the...

Page 8: ... one for red one for blue and one for green to energize the phosphor that coats the inner side of the display end of a cathode ray tube see illustration Electron beams emanate from electron guns which are finely pointed heated cathodes placed in close proximity to a positively charged annular plate called a grid The electrostatic force imposed by the grid pulls rays of energized electrons from the...

Page 9: ... to each pixel location the Basys 2 uses three bits per pixel The controller must index into video memory as the beams move across the display and retrieve and apply video data to the display at precisely the time the electron beam is moving across a given pixel A VGA controller circuit must generate the HS and VS timings signals and coordinate the delivery of video data based on the pixel clock T...

Page 10: ... given row These two continually running counters can be used to form an address into video RAM No time relationship between the onset of the HS pulse and the onset of the VS pulse is specified so the designer can arrange the counters to easily form video RAM addresses or to minimize decoding logic for sync pulse generation 7 Expansion Connectors 6 pin Headers The Basys 2 board provides four 6 pin...

Page 11: ...RED1 E2 SW6 B3 GND M8 VDDO 3 C4 NC N3 SW7 C13 JD3 F3 SW5 A4 GND E1 VDDO 3 B4 SW3 M6 UCLK C14 RED0 F2 USB ASTB A8 GND J2 VDDO 3 A3 JA2 P6 LD3 G12 BTN0 F1 USB DSTB C1 GND A5 VDDO 2 A10 JC3 P7 LD2 K14 AN3 G1 LD7 C7 GND E12 VDDO 2 C9 JC4 M4 BTN2 J12 AN1 G3 SW4 C10 GND K1 VDDO 2 B9 JC2 N4 LD5 J13 BLU2 H1 USB DB6 E3 GND P9 VDDO 2 A9 JC1 M5 LD0 J14 HSYNC H2 USB DB5 E14 GND A11 VDDO 1 B8 MCLK N5 LD4 H13 B...

Page 12: ...ts reserved Other product and company names mentioned may be trademarks of their respective owners Page 12 of 12 If the self test is not resident in the Platform Flash ROM it can be programmed into the FPGA or reloaded into the ROM using the Adept programming software ...

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