background image

Pmod JA

Pmod JB

Pmod JC

Pmod JD

Pin 9

M18

N15

R13

T11

Pin 10

N18

P16

V14

U11

Table 8.1. Arty S7 Pmod Pinout.

The standard Pmod connectors are connected to the FPGA via 200 Ohm series resistors. The series resistors prevent short circuits that can occur if the user accidentally drives a signal
that is supposed to be used as an input. The downside to this added protection is that these resistors can limit the maximum switching speed of the data signals. If the Pmod being used
does not require high-speed access, then the standard Pmod connector should be used to help prevent damage to the devices.

The High-speed Pmods use the standard Pmod connector, but have their data signals routed as impedance matched differential pairs for maximum switching speeds. They have pads
for loading resistors for added protection, but the Arty S7 ships with these loaded as 0-Ohm shunts. With the series resistors shunted, these Pmods offer no protection against short
circuits, but allow for much faster switching speeds. The signals are paired to the adjacent signals in the same row: pins 1 and 2, pins 3 and 4, pins 7 and 8, and pins 9 and 10.

Traces are routed 100 ohm (+/- 10%) differential.

These connectors should be used only when high speed differential signaling is required or the other Pmods are all occupied. If used as single-ended, coupled pairs may have significant
crosstalk. In applications where this is a concern, the standard Pmod connector shall be used. Another option would be to ground one of the signals (drive it low from the FPGA) and
use its pair for the signal-ended signal.

Since the High-Speed Pmods have 0-ohm shunts instead of protection resistors, the operator must take precaution to ensure that they do not cause any shorts.

The Arty S7 can be connected to standard Arduino and chipKIT shields to add extended functionality. Special care was taken while designing the Arty S7 to make sure it is compatible
with the majority of Arduino and chipKIT shields on the market. The shield connector has 45 pins connected to the FPGA for general purpose Digital I/O. Due to the flexibility of
FPGAs, it is possible to use these pins for just about anything including digital read/write, SPI connections, UART connections, I2C connections, and PWM. Six of these pins (labeled
AN0-AN5) can also be used as single-ended analog inputs with an input range of 0V-3.3V, and another four (labeled AN6-9) can be used as differential analog input pairs with an input
range of 0V-1.0V.

Note: The Arty S7 is not compatible with shields that output 5V digital or analog signals. Driving pins on the Arty S7 shield connector above 5V may cause damage to
the FPGA.

Figure 9.1 diagrams the pins found on the shield connector of the Arty S7.

(https://reference.digilentinc.com/_media/arty/arty_shield_pins.png)

 Figure 9.1. Shield connector pin diagram.

Pin Name

Shield Function

Arty S7 Connection

Shared
Connections

IO0-IO9, A
(IO42), A10-A11

General purpose I/O
pins

See Section titled “Shield Digital I/O”

IO26-IO33

General purpose I/O
pins

See Section titled “Shield Digital I/O”

Pmod JD

IO34-IO41

General purpose I/O
pins

See Section titled “Shield Digital I/O”

Pmod JC

SCL

I2C Clock

See Section titled “Shield Digital I/O”

8.1 Standard Pmod

8.2 High-Speed Pmod

9 Arduino/chipKIT Shield Connector

Summary of Contents for Arty S7

Page 1: ...ty form factor provides users with a wide variety of I O and expansion options Use the dual row Arduino connectors to mount one of the hundreds of hardware compatible shields available or use the Pmod...

Page 2: ......

Page 3: ......

Page 4: ...Flash Memory 256MB DDR3L with a 16 bit bus 650MHz 16MB Quad SPI Flash Power Powered from USB or any 7V 15V external power source USB USB JTAG Programming circuitry USB UART Bridge Switches Push button...

Page 5: ...alyzer assists with debugging logic and the HLS tool allows you to compile C code directly into HDL Design resources example projects and tutorials are available for download at the Arty S7 Resource C...

Page 6: ...of Header J7 Header JP13 labeled 5V SELECT is used to determine which source is used A power good LED LD9 driven by the power good PWRGD output of the ADP5052 regulator indicates that the board is re...

Page 7: ...ed by the Quad SPI flash on power up The FPGA configuration data is stored in files called bitstreams that have the bit file extension The Vivado software from Xilinx can create bitstreams from VHDL V...

Page 8: ...gle ended and connected directly to the onboard 100MHz oscillator on pin R2 The Reference clock should be set to no buffer and can be connected to a 200 MHz clock generated from a clocking wizard else...

Page 9: ...wing through the port the transmit LED LD8 and the receive LED LD7 Signal names that imply direction are from the point of view of the DTE Data Terminal Equipment in this case the PC The FT2232HQ is a...

Page 10: ...auses the different colors to be illuminated at different intensities allowing virtually any color to be displayed Pmod connectors are 2 6 right angle 100 mil spaced female connectors that mate with s...

Page 11: ...and use its pair for the signal ended signal Since the High Speed Pmods have 0 ohm shunts instead of protection resistors the operator must take precaution to ensure that they do not cause any shorts...

Page 12: ...pin Table 9 1 Arty S7 Shield Pinout The pins connected directly to the FPGA can be used as general purpose inputs or outputs These pins include the I2C SPI and general purpose I O pins There are 200 O...

Page 13: ...the analog inputs connected to the shield pins The XADC core is controlled and accessed from a user design via the Dynamic Reconfiguration Port DRP The DRP also provides access to voltage monitors tha...

Page 14: ...om Digilent https www youtube com user DigilentInc https instagram com digilentinc https github com digilent https www reddit com r digilent https www linkedin com company 1454013 https www flickr com...

Reviews: