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Summary of Contents for NS9210

Page 1: ...NS9210 Processor Module Hardware Reference 90001002_A August 2008...

Page 2: ...Digi logo a Digi International Company Digi JumpStart Kit ConnectCore NET NET OS and NET Works are trademarks or registered trademarks of Digi International Inc in the United States and other countrie...

Page 3: ...d Type 11 X1 pinout 11 X2 pinout 15 Configuration pins CPU 23 Default module CPU configuration 23 Configuration pins Module 24 Identification of the module 24 Module pin configuration 24 Clock generat...

Page 4: ...2 A b o u t t h e D e v e l o p m e n t B o a r d 35 What s on the development board 35 The development board 37 User interface 38 Switches and pushbuttons 39 Reset control S3 39 Power switch S2 39 U...

Page 5: ...orts 46 Serial port D RS232 46 Serial port A TTL interface 47 Serial port C TTL interface 48 Serial port B MEI interface 49 I2C interface 50 I2 C header 50 I2C digital I O expansion 50 SPI interface 5...

Page 6: ...X11 pinout 63 X20 pinout 64 X21 pinout 65 Appendix A Specifications 67 Environmental specifications 67 Mechanical specifications 67 Safety statements 67 Power requirements 68 Typical module current po...

Page 7: ...ived in your package and the documentation on the web site the web site content is the latest version Customer support To get help with a question or technical problem with this product or to make com...

Page 8: ...8 ConnectCore 9P 9215 Hardware Reference...

Page 9: ...in a compact and versatile form factor The NS9210 Processor Module is built around the NS9215 processor with a powerful ARM926EJ S core For further information about the NS9215 see the NS9215 Hardwar...

Page 10: ...nt places Integrated 10 100Mbps Ethernet MAC PHY I2C interface JTAG signals available on module connector 8 ADC analog to digital converter inputs 2x flexible interface modules FIMs running at max 300...

Page 11: ...AG 10k pull up on module 9 O TDO TDO JTAG 10k pull up on module 10 I TRST TRST JTAG 2k2 pull up on module 11 O RTCK RTCK JTAG Optional 12 I CONF2 OCD_EN CONF2 OCD_EN 10k pull up on module 13 I LITTLE...

Page 12: ...O D5 D5 27 I O D6 D6 28 I O D7 D7 29 I O D8 D8 30 I O D9 D9 31 I O D10 D10 32 I O D11 D11 33 I O D12 D12 34 I O D13 D13 35 I O D14 D14 36 I O D15 D15 37 P GND GND 38 O AO AO Buffered Address always ac...

Page 13: ...IN 66 O ETH_ACTIVITY ETH_ACTIVITY Low active signal with 330R resistor on module 67 I ETH_TPIP ETH_TPIP 68 O ETH_LINK ETH_LINK Low active signal with 330R resistor on module 69 O ETH_TPON ETH_TPON 70...

Page 14: ...VRTC VRTC Backup Battery for RTC for 3V cell Can be left floating if RTC backup not needed 79 P VLIO VLIO Mobile Power from Li Ion Battery 2 5V 5 5V Non Mobile connected to 3 3V 80 P GND GND X1 pin nu...

Page 15: ...DONE PIC_0_GEN_IO 0 GPIO0 SPI_EN dup 4 I O CTSA EIRQ0 PIC_0_GEN_IO 1 GPIO1 reserved 5 I O DSRA EIRQ1 PIC_0_GEN_IO 2 GPIO2 reserved 6 I O RXDA DMA0_PDEN PIC_0_GEN_IO 3 GPIO3 SPI_RX dup 7 I O RIA EIRQ2...

Page 16: ...CLK 14 I O RXDC DMA1_DP EIRQ2 dup GPIO11 SPI_RXboot 15 I O RIC RXCLKC I2C_SDA RST_DONE GPIO12 SPI_CLK dup When booting NS9215 RIC signal is default configured as Output RST_DONE To avoid input output...

Page 17: ...C_0_BUS_1 10 PIC_1_BUS_1 10 GPIO53 22 I O RXDB dup PIC_0_BUS_1 11 PIC_1_BUS_1 11 GPIO54 23 I O RIB dup PIC_0_BUS_1 12 PIC_1_BUS_1 12 GPIO55 24 I O RTSB dup RS485CTLB dup PIC_0_BUS_1 13 PIC_1_BUS_1 13...

Page 18: ..._1 19 PIC_1_BUS_1 19 GPIO62 31 I O RID dup PIC_0_BUS_1 20 PIC_1_BUS_1 20 GPIO63 32 I O RTSD dup RS485CTLD dup PIC_0_BUS_1 21 PIC_1_BUS_1 21 GPIO64 33 I O TXCLKD dup DTRD dup PIC_0_BUS_1 22 PIC_1_BUS_1...

Page 19: ..._IO 4 PWM2 GPIO72 41 I O PIC_0_GEN_IO 5 PIC_1_GEN_IO 5 PWM3 GPIO73 42 I O PIC_0_GEN_IO 6 PIC_1_GEN_IO 6 Timer0_In GPIO74 43 I O PIC_0_GEN_IO 7 PIC_1_GEN_IO 7 Timer1_In GPIO75 44 I O PIC_0_CTL_IO 0 PIC...

Page 20: ...S_0 2 PIC_1_BUS_0 2 Timer8_In dup GPIO82 51 I O PIC_0_BUS_0 3 PIC_1_BUS_0 3 Timer9_In dup GPIO83 52 I O PIC_0_BUS_0 4 PIC_1_BUS_0 4 Timer0_Out GPIO84 53 I O PIC_0_BUS_0 5 PIC_1_BUS_0 5 Timer1_Out GPIO...

Page 21: ...7 61 I O PIC_0_BUS_1 2 PIC_1_BUS_1 2 PIC_1_CAN_RXD GPIO98 62 I O PIC_0_BUS_1 3 PIC_1_BUS_1 3 PIC_1_CAN_TXD GPIO99 63 I O PIC_0_BUS_1 4 PIC_1_BUS_1 4 PWM4 GPIO100 64 I O PIC_0_BUS_1 5 PIC_1_BUS_1 5 EIR...

Page 22: ...VIN3_ADC 71 I VIN4_ADC 72 I VIN5_ADC 73 I VIN6_ADC 74 I VIN7_ADC 75 P VSS_ADC Connected on module to AGND through 0 resistor 76 P VREF_ADC 100nF decoupling capacitor between VREF_ADC and VSS_ADC 77 P...

Page 23: ...s from outside if the module configuration signals described below are correctly configured Default module CPU configuration The user has access to six configuration signals LITTLE BIG_ ENDIAN which a...

Page 24: ...om outside The NS9210 Processor Module has also available 4 bit for platform identification This bit field can be read out through GEN ID register and correspond to A 16 13 Configuration of these sign...

Page 25: ...to A15 through a 2k2 series resistor Read bit 6 of GEN ID register 0xA0900210 SW_CONF3 User defined software configuration pin can be read in GEN ID register bit 7 default high Connected to A16 throug...

Page 26: ...Processor Module boots directly from NOR flash The start up code is located at address 0x00000000 during the boot process When the system is booted the SDRAM is remapped to address 0x00000000 and Nor...

Page 27: ...u l t i p l e x e d G P I O p i n s The 64 GPIOs pins available on the module connector are multiplexed with other functions like Name CPU Sig name Pin Address range Size Mb Usage Comments SDM_CS0 CS1...

Page 28: ...le below the default function is written bold means low active signal dup means function is available multiple times Port name Function 03 Alternate function 00 Alternate function 01 Alternate functio...

Page 29: ...ines GPIO21 D5 RTSB 485CTLB DMA0_PDEN dup Reserved for upper data lines GPIO22 D6 TXCLKB DTRB DMA1_DONE dup Reserved for upper data lines GPIO23 D7 TXDB PIC_1_CAN_RXD Reserved for upper data lines GPI...

Page 30: ...II Interface GPIO45 MII_TXD1 PIC_1_GEN_IO 5 Reserved MII Interface GPIO46 MII_TXD2 PIC_1_GEN_IO 6 Reserved MII Interface GPIO47 MII_TXD3 PIC_1_GEN_IO 7 Reserved MII Interface GPIO48 MII_COL Reserved R...

Page 31: ..._1_GEN_IO 7 Timer1_In PIC_0_GEN_IO 7 GPIO76 PIC_0_CTL_IO 0 PIC_1_CTL_IO 0 Timer2_In PIC_0_CTL_IO 0 GPIO77 PIC_0_CTL_IO 1 PIC_1_CTL_IO 1 Timer3_In PIC_0_CTL_IO 1 GPIO78 PIC_0_CTL_IO 2 PIC_1_CTL_IO 2 Ti...

Page 32: ...14 QDCI dup QDCI GPIO95 PIC_0_BUS_0 15 PIC_1_BUS_0 15 QDCQ dup QDCQ GPIO96 PIC_0_BUS_1 0 PIC_1_BUS_1 0 PIC_0_CAN_RXD PIC_0_CAN_RXD GPIO97 PIC_0_BUS_1 1 PIC_1_BUS_1 1 PIC_0_CAN_TXD PIC_0_CAN_TXD GPIO9...

Page 33: ...before PHY can be used When not used the PHY can be put in low power mode by asserting GPIO90 low The PHY address on the MII bus is 0x7 0b00111 The module does not only provide access to the Ethernet...

Page 34: ...e battery current without 3 3V power applied is up to 40 A The current is used to power the RTC 32 768kHz oscillator and 64 byte internal RAM When the development board ships from the factory the batt...

Page 35: ...Four serial interface connectors 1 x UART B MEI RS232 RS4xx with status LEDs on SUB D 9 pin connector X6 1 x UART D RS232 with status LEDs on SUB D 9 pin connector X3 1 x UART C with TTL levels share...

Page 36: ...p t e r 2 9 30VDC power supply Current measurement option Development board Module and module alone 3 3V coincell battery with socket PoE connectors for optional application kit IEEE 802 3af Prototypi...

Page 37: ...www digiembedded com 37 The development board...

Page 38: ...ovided on the module The user LEDs on the development board can be enabled or disabled by correctly setting jumper J5 6 The table below shows which NS9215 GPIO is available for implementing the user i...

Page 39: ...reset controller is located on the NS9210 Processor Module Power switch S2 The development board has an ON OFF switch S2 The power switch S2 can switch both 9V 30V input power supply and 12V coming o...

Page 40: ...umber pin number For example pin 1 in switch 4 is specified as S4 1 Module configuration switches S4 Use S4 to configure the module Wake up button S8 The wake up pushbutton S8 generates an external in...

Page 41: ...On Auto Power Down enabled Off Auto Power Down disabled Auto Power Down is not supported on this board This signal is only accessible to permit the user to completely disabled the MEI interface for u...

Page 42: ...42 NS9210 Processor Module Hardware Reference C h a p t e r 2 J um p e rs Battery Jumper J2 Serial Port D transceiver Jumper J1 User LED1 Jumper J5 User LED2 Jumper J4 WLAN Jumper J3...

Page 43: ...s is for keeping time in the RTC Connection not made Backup battery disabled J3 WLAN_DISABLE Reserved for future use Disables the WiFi unit on the module Connection made WLAN disabled J4 USER_LED2 Ena...

Page 44: ...itched LE3 ON indicates the 9VDC 30VDC power is present LE4 ON indicates the 3 3VDC power is present User LEDs LE5 and LE6 The user LEDs are controlled through applications running on the NS9210 Proce...

Page 45: ...color of the LED will change when the voltage is switching Status LEDs Serial Port D LEDs Status LEDs Serial Port B LEDs Signal name LED GPIO used USER_LED1 LE5 GPIO82 USER_LED2 LE6 GPIO85 LED refere...

Page 46: ...erial UART port D connector X3 is a DSUB9 male connector and is also used as the standard console This asynchronous serial port is DTE and requires a null modem cable to connect to a computer serial p...

Page 47: ...ve GPIO signals It is the responsibility of the driver to configure them properly Serial Port A must not be connected if SPI or WakeUp functionality is used Pin Function Defaults to 1 DCD GPIO59 2 RXD...

Page 48: ...GPIO12 as RIC be sure to populate a series resistor on the baseboard This is necessary to avoid conflict between the default configuration of the GPIO when booting RESET_DONE output and the chosen con...

Page 49: ...configured using switch S1 Note that all pins on S1 contribute to the line driver settings for this port Serial port B pins are allocated as shown By default Serial B signals are configured to their...

Page 50: ...vices like EEPROMs can be connected to the module by using I C header X15 The pinning of this header is provided below I2 C digital I O expansion The development board provides a 3 81mm 1 50 green ter...

Page 51: ...www digiembedded com 51 The I O expander is a Philips PCA9554D at I2C address 0x20 0x21 The pins are allocated as shown Pin Signal 1 IO_0 2 IO_1 3 IO_2 4 IO_3 5 IO_4 6 IO_5 7 IO_6 8 IO_7 9 GND...

Page 52: ...ng the SPI connector X8 The SPI interface on the development board is shared with UART_A NS9215 port A Because the module s SPI interface is shared with a UART interface you cannot use both simultaneo...

Page 53: ...www digiembedded com 53 Pin allocation SPI connector pins are allocated as shown Pin Signal 1 3 3V 2 TXDA SPI_TXD GPIO7 3 RXDA SPI_RXD GPIO3 4 RTSA SPI_CLK GPIO5 5 DCDA SPI_EN GPIO0 6 GND...

Page 54: ...ment board allows to measure the current used by the development board and module through R80 and the current used by the internal NS9215 1 8V core generated from VLIO using a high efficiency synchron...

Page 55: ...different power supplies measure DC voltage across the sense CMO resistor The value of the resistor is 0 025R 1 Calculate the current using this equation I U R where I current in Amps U measured volta...

Page 56: ...evelopment board has two PoE module connectors X9 and X26 The PoE module is an optional accessory item that can be plugged on the development board through the two connectors X9 input connector Provid...

Page 57: ...giembedded com 57 The PoE module Plug in the PoE module at a right angle to the development board as shown in this drawing PoE header X9 PoE header X26 Power Jack X24 Jump Start development board PoE...

Page 58: ...ower jack is labeled X24 on the development board This figure schematically represents the power jack s polarity E t h e r n e t i n t e r f a c e The module provides the 10 100 Ethernet PHY chip The...

Page 59: ...mode A 802 3af Mid Span Mode B Description 1 TXD Negative VPort Transmit data 2 TXD Negative VPort Transmit data 3 RXD Positive VPort Receive data 4 EPWR Positive VPort Power from switch 5 EPWR Posit...

Page 60: ...nector These LEDs are not programmable P e r i p h e r a l e x p a n s i o n h e a d e rs LED Description Yellow Network activity speed Flashing when network traffic detected Off when no network traff...

Page 61: ...wn daughter card to the module s address data bus Peripheral application header X33 Peripheral application pins are allocated as shown Pin Signal Pin Signal 1 GND 2 BDO 3 BD1 4 BD2 5 BD3 6 GND 7 BD4 8...

Page 62: ...dule pinout on page 12 for related information Test connectors The development board provides two 4x20 pin test connectors labeled X10 X11 and X20 X21 These connectors are 1 1 copies of the module pin...

Page 63: ...B8 BD9 A9 BD12 B9 BD13 A10 GND B10 BA0 A11 BA3 B11 BA4 A12 BA7 B12 BA8 A13 BA11 B13 BA12 A14 BA15 B14 BA16 A15 EXT_WE B15 EXT_CS0 A16 BE3 B16 EXT_WAIT A17 ETH_TPIN NC B17 NC ETH_ACTIVITY A18 ETH_TPON...

Page 64: ...pin Signal X20 pin Signal A1 GND B1 GND A2 DSRA GPIO2 B2 RXDA SPI_RXD GPIO3 A3 DTRA GPIO6 B3 TXDA SPI_TXD GPIO7 A4 DSRC GPIO10 B4 RXDC GPIO11 A5 DTRC TXCLKC GPIO14 B5 TXDC GPIO15 A6 DSRB GPIO53 B6 RX...

Page 65: ...RXCLKC GPIO12 D4 RTSC RCLKC GPIO13 C5 DCDB GPIO51 D5 CTSB GPIO52 C6 RIB GPIO55 D6 RTSB GPIO56 C7 DCDD GPIO59 D7 CTSD GPIO60 C8 RID GPIO63 D8 RTSD GPIO64 C9 GPIO67 D9 GPIO68 C10 GPIO71 D10 GPIO72 C11 G...

Page 66: ...66 NS9210 Processor Module Hardware Reference C h a p t e r 2...

Page 67: ...to 95 non condensing Altitude 0 to 12 000 feet M e c h a n i c a l s p e c i f i c a t i o n s The module size is 50 x 50mm Two board to board connectors are used on the module The distance between t...

Page 68: ...component containing a radio such that the antenna is very close to or touching any exposed parts of the body especially the face or eyes while transmitting Do not operate a portable transmitter near...

Page 69: ...0 and the ethernet connected to a 100Mb network using a standard module plugged into a JumpStart Kit board with nominal voltage applied 1 This measurement was taken from the R80 current sense resistor...

Page 70: ...70 NS9210 Processor Module Hardware Reference A Module top view Note Measurements are in millimeters Module side view Note Measurements are in millimeters...

Page 71: ...ith the recommendations from Berg FCI for the mating connector Berg FCI 61083 084409LF There is a 41mm separation between the two module connectors Drawing number 61083 on the FCI web page www fciconn...

Page 72: ...2 NS9210 Processor Module Hardware Reference A Device Berg FCI connector NS9210 Processor Module 61082 081409LF NS9210 Processor Module JumpStart board mating connector on the base board 61083 084409L...

Page 73: ...e triggered external interrupt is too slow then an interrupt may be detected on both the rising and falling edge of the input signal A maximum rise and fall time must be met to ensure that reset and e...

Page 74: ...74 NS9210 Processor Module Hardware Reference A...

Page 75: ...antee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment...

Page 76: ...ges or modifications to this equipment not expressly approved by Digi may void the user s authority to operate this equipment Industry Canada This digital apparatus does not exceed the Class B limits...

Page 77: ...applies to Class B personal Personal computers and peripherals The product listed above has been tested at an External Test Laboratory certified per FCC rules and has been found to meet the FCC Part...

Page 78: ...nce B International EMC Standards The NS9210 Processor Module meets the following standards Standards NS9210 Processor Module Emissions FCC Part 15 Subpart B ICES 003 Immunity EN 55022 EN 55024 Safety...

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Page 80: ...80 ConnectCore 9P 9215 Hardware Reference...

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