ZIRCON-MM
User Manual v2.11 © 2002 Diamond Systems Corporation P. 5
3. BASE ADDRESS CONFIGURATION
The base address is the address of the lowest location in the board’s I/O map. Zircon-MM's base
address is set with header
J5
, located at the lower right corner of the board. Seven different base
addresses are available; see the table below. The default setting is 300 Hex. "Open" means an open
position, and "Inst" means a position with a jumper installed. Note that 3 jumpers are never installed,
only 0, 1 or 2.
Base Address Header J5 Position
Hex Decimal C B A
240 576 Open Open Open
280 640 Open Open Inst
2C0 704 Open Inst Open
300 768 (Default) Open Inst Inst
340 832 Inst Open Open
380 896 Inst Open Inst
3C0 960 Inst Inst Open
4. INTERRUPT CONFIGURATION
Interrupt operation is configured with header
J6
, located in the lower center of the board.
One position is used for the PC/104 1K
Ω
pulldown resistor to enable interrupt sharing. This resistor
should be connected if interrupts are used. Only one resistor should be connected to any interrupt
line on the bus. Interrupts on Zircon-MM are driven by a tristate driver. When an interrupt is pending,
the interrupt line is driven high, and when it is not pending, the output is in high-impedance mode,
and the 1K
Ω
resistor pulls it down to a logic 0 state.
Once an interrupt request is generated by Zircon-MM, it is reset by reading from the A/D converter
(read from base + 0 or base + 1).
Interrupts are enabled, disabled, and reset under software control. This header is used only to select
the level and the resistor configuration.
Position Function Open Jumper
R 1K
Ω
Resistor No pulldown Pulldown (max 1 per level)
2 IRQ2
3 IRQ3 Install only one jumper in
4 IRQ4 any of these 6 locations
5 IRQ5 to select the interrupt level
6 IRQ6
7 IRQ7
