46
3
Award BIOS Setup Utility
3.1.3 Advanced Chipset Features
This section gives you functions to configure the system based on
the specific features of the chipset. The chipset manages bus speeds
and access to system memory resources.
These items should not
be altered unless necessary.
The default settings have been chosen
because they provide the best operating conditions for your system.
The only time you might consider making any changes would be if
you discovered some incompatibility or that data was being lost
while using your system.
DRAM Timing By SPD
Enabled
The EEPROM on a PC SDRAM DIMM that has SPD
(Serial Presence Detect) data structure stores information
about the module such as the memory type, memory
size, memory speed, etc. When this field is enabled, the
system will run according to the information in the
EEPROM.
Disabled
It allows you to configure the 3 fields that follow (DRAM
Clock, SDRAM Cycle Length and Bank Interleave). The
system will run according to the settings in these fields.
CMOS Setup Utility - Copyright (C) 1984-2000 Award Software
Advanced Chipset Features
Item Help
Menu Level
↑↓→←
Move
F6:Fail-Safe Defaults
F7:Optimized Defaults
F1:General Help
Enter:Select
F5:Previous Values
+/-/PU/PD:Value
F10:Save
ESC:Exit
The settings on the screen are for reference only. Your version may not be
identical to this one.
X
DRAM Timing By SPD
SDRAM Cycle Length
Bank Interleave
Memory Hole
P2C/C2P Concurrency
Fast R-W Turn Around
System BIOS Cacheable
Video RAM Cacheable
Frame Buffer Size
AGP Aperture Size
AGP-4X Mode
AGP Driving Control
AGP Driving Value
OnChip USB
USB Keyboard Support
OnChip Sound
OnChip Modem
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI#2 Access #1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
Disabled
3
Disabled
Disabled
Enabled
Disabled
Disabled
Disabled
8M
64M
Enabled
Auto
DA
Disabled
Enabled
Auto
Auto
Enabled
Enabled
Enabled
Enabled
Enabled
Disabled
Disabled