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Award BIOS Setup Utility
Memory Hole At 15M-16M
In order to improve system performance, certain space in memory can
be reserved for ISA cards. This memory must be mapped into the
memory space below 16MB. When enabled, the CPU assumes the 15-
16MB memory range is allocated to the hidden ISA address range
instead of the actual system DRAM. When disabled, the CPU assumes
the 15-16MB address range actually contains DRAM memory. If more
than 16MB of system memory is installed, this field must be disabled
to provide contiguous system memory.
Read Around Write
With this field set to enabled, whenever the CPU issues a write
command, the write data will be stored in the memory controllers
buffer. The next time the CPU needs the data, the memory controller
can provide them without accessing the SDRAM.
Concurrent PCI/Host
When enabled, the PCI/AGP master to CPU cycle will be concurrent
whenever the Host CPU is performing R/W access to the PCI or
slave devices.
CPU to PCI Write Buffer
Enabled
Writes from the CPU to the PCI bus are buffered to
offset the speed difference between the CPU and PCI
bus.
Disabled
Writes are not buffered therefore the CPU must wait
until the write cycle is complete before starting another
write cycle.
PCI Dynamic Bursting
When enabled, every write transaction goes to the write buffer.
PCI Master 0 WS Write
When enabled, writes to the PCI bus are executed with zero wait
state.
