Denon DVD-3930, Service Manual

Page: 44 / 176

44
DVD-3930/3930CI
SEMICONDUCTORS
Only major semiconductors are shown, general semiconductors etc. are omitted to list.
主な半導体を記載しています。汎用の半導体は記載を省略しています。
1. IC’s
Note : Abbreviation ahead of IC No. indicates the name of P.W.B., etc.
注 ) : IC No. の前の記号は、基板の名称を表します。
MA : MAIN/A. VIDEO P.W.B. PD : POWER/DISPLAY P.W.B.
AU : AUDIO P.W.B. DI : DIGITAL VIDEO P.W.B.
D708E001RFP250 (AU: IC303)
D708E001RFP250 Terminal Function
Pin No. Signal Name Type Description
1 V
SS
- Ground
2 AHCLKX0/AHCLKX2 I/O McASP0 and McASP2 Transmit Master Clock
3 AMUTE0 O McASP0 MUTE Output
4 AMUTE1 O McASP1 MUTE Output
5 AHCLKX1 I/O McASP1 Transmit Master Clock
6 V
SS
- Ground
7 ACLKX1 I/O McASP1 Transmit Bit Clock
8 CV
DD
- Core Supply
9 ACLKR1 I/O McASP1 Receive Bit Clock
10 DV
DD
- I/O Supply
11 AFSX1 I/O McASP1 Transmit Frame Sync (L/R Clock)
12 AFSR1 I/O McASP1 Receive Frame Sync (L/R Clock)
78
EM_A[7]
109
1
108
72
2
107
3
106
4
105
5
104
6
103
7
102
8
101
9
100
10
99
11
98
12
97
13
96
14
95
15
94
16
93
17
92
18
91
19
90
20
89
21
88
22
87
23
86
24
85
25
84
26
83
27
82
28
81
29
80
30
79
31 32
77
33
76
34
75
35
74
36
73
110 71
111 70
112 69
113 68
114 67
115 66
116 65
117 64
118 63
119 62
120 61
121 60
122 59
123 58
124 57
125 56
126 55
127 54
128 53
129 52
130 51
131 50
132 49
133 48
134 47
135 46
136 45
137 44
138 43
139 42
140 41
141 40
142 39
143 38
37
144
V
SS
AHCLKX0/AHCLKX2
AMUTE0 AMUTE1
AHCLKX1
V
SS
ACLKX1
CV
DD
ACLKR1
DV
DD
AFSX1
AFSR1
V
SS
RESET
V
SS
CV
DD
CLKIN
V
SS
TMS
CV
DD
TRST
OSCV
SS
OSCIN
OSCOUT
OSCV
DD
V
SS
PLLHV
TDI
TDO
V
SS
DV
DD
EMU[0]
CV
DD
EMU[1]
TCK
V
SS
SPI0_CLK/I2C0_SCL SPI0_SCS
/I2C1_SCL
V
SS
SPI0_ENA
/I2C1_SDA
EM_OE DV
DD
EM_RW CV
DD
EM_CS[2] V
SS
EM_RAS EM_CS[0] EM_BA[0] V
SS
EM_BA[1] EM_A[10] DV
DD
EM_A[0] CV
DD
EM_A[1] EM_A[2] V
SS
EM_A[3] CV
DD
EM_A[4] EM_A[5] V
SS
DV
DD
EM_A[6] V
SS
CV
DD
EM_A[8] EM_A[9] EM_A[1
1]
DV
DD
V
SS
SPI0_SIMO
SPI0_SOMI/I2C0_SDA
DV
DD
AXR0[0]
V
SS
AXR0[1]
AXR0[2]
AXR0[3]
V
SS
AXR0[4]
AXR0[5]/SPI1_SCS
AXR0[6]/SPI1_ENA
AXR0[7]/SPI1_CLK
CV
DD
V
SS
DV
DD
AXR0[8]/AXR1[5]/SPI1_SOMI
AXR0[9]/AXR1[4]/SPI1_SIMO
CV
DD
V
SS
AXR0[10]/AXR1[3]
AXR0[11]/AXR1[2]
CV
DD
V
SS
AXR0[12]/AXR1[1]
AXR0[13]/AXR1[0]
DV
DD
AXR0[14]/AXR2[1]
AXR0[15]/AXR2[0]
ACLKR0
V
SS
AFSR0
ACLKX0
AHCLKR0/AHCLKR1
AFSX0
V
SS
EM_CLK
EM_CKE
V
SS
DV
DD
EM_WE_DQM[1]
EM_D[8]
CV
DD
EM_D[9]
EM_D[10]
V
SS
EM_D[11]
DV
DD
EM_D[12]
EM_D[13]
CV
DD
EM_D[14]
EM_D[15]
V
SS
CV
DD
EM_D[0]
EM_D[1]
DV
DD
EM_D[2]
EM_D[3]
V
SS
EM_D[4]
EM_D[5]
CV
DD
EM_D[6]
DV
DD
EM_D[7]
V
SS
EM_WE_DQM[0]
EM_WE
EM_CAS