71
DVD-3910
TSB41AB2 (IE: IC111))
1 2 3
AGND
AV
DD
AV
DD
SM
SE
TESTM
DV
DD
DV
DD
CPS
ISO
PC2
PC1
PC0
C/LKON
DGND
DGND
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
4
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
AGND
AGND
AV
DD
AV
DD
RESET
FILTER0
FILTER1
PLLV
DD
PLLGND
PLLGND
XI
XO
DV
DD
DV
DD
DGND
DGND
5 6 7 8
TPB0–
TPBIAS0
47 46 45 44 43
48
42
TP
A1+
TP
A1–
TPB1+
TPB1–
AV
R1
R0
D4
D5
D6
D7
CNA
CTL0
CTL1
D0
D1
D2
D3
40 39 38
41
9 10 11 12 13
37 36
LREQ
TP
A0+
TP
A0–
35 34 33
14 15 16
PD
LPS
NC
TPB0+
AGND
AGND
AGND
TPBIAS1
SYSCLK
PAP PACKAGE
(TOP VIEW)
DD
TSB41AB2
block diagram
Received Data
Decoder/Retimer
Link
Interface
I/O
Arbitration
and Control
State Machine
Logic
Bias Voltage
and
Current
Generator
Transmit Data
Encoder
Cable Port 0
Crystal
Oscillator,
PLL System,
and Clock
Generator
TPA0+
CPS
TPA0–
TPB0+
TPB0–
XI
XO
FILTER0
FILTER1
LPS
ISO
CNA
SYSCLK
LREQ
CTL0
CTL1
D0
D1
D2
D3
D4
D5
D6
D7
TPBIAS0
PD
RESET
TPBIAS1
Cable Port 1
TPA1+
TPA1–
TPB1+
TPB1–
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