Denon DN-A7100 - AV Surround Preamplifier, Service Manual

Page: 52 / 113

72
z
Electrical Characteristics (Unless otherwise noted, Ta=25 C, V
CC
=7V, V
EE
=-7V, f=1kHz, V
IN
=1Vrms,
RL=10k Rg=600 Master volume=0dB, Output gain=0dB)
7pin
5pin
No signal Circuit current
Measure : Pin13, 14 Output voltage gain
Measure : Pin13, 14, BW
=
400
∼
30kHz Total harmonic distortion ratio
Measure : Pin13, 14, THD
=
1% Maximum output voltage
Measure : Pin13, 14, Rg
=
0
Ω
, BW
=Ι
HF
−
A Output noise voltage
Measure : Pin1, 3 Input impedance
Measure : Pin13(OUT2), Rg
=
0
Ω
, BW
=
IHF
−
A,
Reference : Pin14(OUT1)
=
1Vrms
Cross-talk between channels
Measure : Pin13, 14, V
IN
=
3Vrms Volume control range
BW=IHF
−
A, Measure : Pin13, 14, V
IN
=
3Vrms Maximum attenuation
Measure : Pin13, 14, V
IN
=
0.4Vrms Output gain control range
IQ
G
V
THD
Vomax
Vno
Rin
CTC
GVR
Vmin
GOG
Symbol
−
−
2
−
3.4
−
20
−
−
106
−
16
Min.
6
0.09
−
5
40
−
70
−
100
−
105
20
Max.
mA
dB
%
Vrms
μ
Vrms
k
Ω
dB
dB
dB
dB
Unit Conditions
2
0
0.005
4.2
1.2
30
−
100
−
103
−
118
18
Typ. Parameter
+
2
z z
Application circuit diagram
14 OUT1
13 OUT2
12 SEL
DGND
MUTE
11
10
DA
V
CC
V
EE
AGND
AGND
AGND
IN 1
9
CL
8 7
6
5
4
2
LOGIC
+
+
47µ
10µ
IN 2
+
10µ
+
47µ
3
1
BD3812F
+
+
−
−
IC21 : BD3812F
IC27 : CS4900 Family
Pin
No.
I/O Function Description
1 I/O UHS0, GPIO18 Mode Select Bit 0, General Purpose I/O
2 I/O UHS1, GPIO19 Mode Select Bit 1, General Purpose I/O
3 INTREQ Control Port Interrupt Request
4 I FA1, FSCDIN Host Address Bit One or SPI Serial Control Data Input
5 I/O GPIO20 General Purpose I/O
6 I FA0, FSCCLK Host Parallel Address Bit Zero or Serial Control Port Clock
7 I/O FHS2,
FSCDIO,
FSCDOUT
Mode Select Bit 2 or Serial Control Port Data Input and
Output, Parallel Port Type Select
8 I/O GPIO21 General Purpose I/O
9 FDAT7 DSP AB Bidirectional Data Bus
10 VDD6 2.5V Supply Voltage
11 VSS6 2.5V Ground
12 FHS0, FWR,
FDS Mode Select Bit 0 or Host Write Strobe or Host Data Strobe
13 O FHS1, FRD,
FR/W Mode Select Bit 1 or Host Parallel Output Enable or Host
Parallel R/W
14 FDAT6 DSP AB Bidirectional Data Bus
15 I FCS Host Parallel Chip Select, Host Serial SPI Chip Select
16 O FINTREQ Control Port Interrupt Request
17 FDBCK Reserved
18 FDAT5 DSP AB Bidirectional Data Bus
19 FDAT4 DSP AB Bidirectional Data Bus
20 VDD7 2.5V Supply Voltage
21 VSS7 2.5V Ground
22 FDAT3 DSP AB Bidirectional Data Bus
23 FDBDA Reserved
24 FDAT2 DSP AB Bidirectional Data Bus
25 DBDA Debug Data
26 DBCK Debug Clock
27 FDAT1 DSP AB Bidirectional Data Bus
28 TEST Reserved
29 FDAT0 DSP AB Bidirectional Data Bus
30 I/O NV_WE,
GPIO16
SRAM Write Enable, General Purpose I/O
31 I/O NV_OE,
GPIO15
SRAM Output Enable, General Purpose I/O
32 I/O NV_CS,
GPIO14
SRAM Chip Select, General Purpose I/O
33 SD_WE SDRAM Write Enable
34 SD_DATA0,
EXTD0 SDRAM Data Bus, SRAM External Data Bus
35 SD_DATA1,
EXTD1 SDRAM Data Bus, SRAM External Data Bus
36 SD_DATA2,
EXTD2 SDRAM Data Bus, SRAM External Data Bus
37 SD_DATA3,
EXTD3 SDRAM Data Bus, SRAM External Data Bus
38 SD_DATA4,
EXTD4 SDRAM Data Bus, SRAM External Data Bus
39 SD_DQM0 SDRAM Data Mask 2
40 SD_DATA5,
EXTD5 SDRAM Data Bus, SRAM External Data Bus
41 VSSSD4 3.3V SDRAM/SRAM/EPROM Interface Ground
42 VDDSD4 3.3V SDRAM/SRAM/EPROM Interface Supply
43 SD_DATA6,
EXTD6 SDRAM Data Bus, SRAM External Data Bus
44 SD_DATA7,
EXTD7 SDRAM Data Bus, SRAM External Data Bus
45 SD_DQM1 SDRAM Data Mask 1
46 SD_DATA15,
EXTA18 SDRAM Data Bus, SRAM External Address Bus
47 SD_DATA14,
EXTA17 SDRAM Data Bus, SRAM External Address Bus
48 NC5 No Connect
49 SD_DATA13,
EXTA16 SDRAM Data Bus, SRAM External Address Bus
50 VSSSD3 3.3V SDRAM/SRAM/EPROM Interface Ground
51 VDDSD3 3.3V SDRAM/SRAM/EPROM Interface Supply
52 SD_DATA12,
EXTA15 SDRAM Data Bus, SRAM External Address Bus
53 SD_DATA11,
EXTA14 SDRAM Data Bus, SRAM External Address Bus
54 SD_DATA10,
EXTA13 SDRAM Data Bus, SRAM External Address Bus
55 SD_DATA9,
EXTA12 SDRAM Data Bus, SRAM External Address Bus
56 SD_DATA8,
EXTA11 SDRAM Data Bus, SRAM External Address Bus
57 VSSSD2 3.3V SDRAM/SRAM/EPROM Interface Ground
58 VDDSD2 3.3V SDRAM/SRAM/EPROM Interface Supply
59 O SD_CLK_OUT SDRAM Clock Output
60 SD_ADDR9,
EXTA9 SDRAM Address Bus, SRAM External Address Bus