60
AVR-4308CI
90
P104/AN4
DSP1 FLAG0/SUBDATA̲O
I
-
Lv
-
Ed
Z
DSP1 control pin (ADSP-21366)/FPGA rewrite control (MAIN FPGA&GUI
FPGA combined use)
91
P103/AN3
DSP2 FLAG0/SUBCONF̲DONE
I
-
Lv
-
Ed
Z
DSP1 control pin (ADSP-21367)/FPGA rewrite control (MAIN FPGA&GUI
FPGA combined use)
92
P102/AN2
DSP2 ICS/SUBnCS
O
C
-
-
Eu
Z
DSP1 control pin (ADSP-21367)/FPGA rewrite control (MAIN FPGA&GUI
FPGA combined use)
93
P101/AN1
DSP1 ICS/SUBASDI
O
C
-
-
Eu
Z
DSP1 control pin (ADSP-21366)/FPGA rewrite control (MAIN FPGA&GUI
FPGA combined use)
94
AVSS
AVSS
-
-
-
-
-
-
AD GND
95
P100/AN0
/SUBDCLK
O
C
-
-
-
Z
/FPGA rewrite control
96
VREF
VREF
-
-
-
-
-
-
AD ref. +3.3V
97
AVCC
AVCC
-
-
-
-
-
-
AD +3.3V
98
P97/SIN4
DSPMISO
I
-
Lv
-
Eu
Z
DSP control pin (ADSP-21366)/(ADSP-21367)
99
P96/SOUT4 DSPMOSI
O
C
-
-
Eu
Z
DSP control pin (ADSP-21366)/(ADSP-21367)
100 P95/CLK4
DSPICLK
O
C
-
-
Eu
Z
DSP control pin (ADSP-21366)/(ADSP-21367)
Pin
Pin Name
Symbol
I/O Type
Det
Op
(Int.)
Op
(Ext.)
Res
Function
Note:
Pin No.
: Terminal number of microcomputer.
Port Name : The name entered in the data sheet of microcomputer.
Symbol
: Symbolized interface function.
I/O
: Input or out of part.
“I”
= Input port
“O”
= Output port
Type
: Composition of port in case of output port.
“C”
= CMOS output
“N”
= NMOS open drain output
“P”
= PMOS open drain output
Op
: Pull up/Pull down selection information.
“Iu”
= Inner microcomputer pull up
“Id”
= Inner microcomputer pull down
“Eu”
= External microcomputer pull up
“Ed”
= External microcomputer pull down
Det
: Indicates judging state of input port. Level detection is “LV”; Edge detection is “Ed”; Detection by both shifting is “E&L”;
Serial data detection is “S” (Serial data output is also “S”).
Res
: State at reset.
“H”
= Outputs High Level at reset
“L”
= Outputs Low Level at reset
“Z”
= Becomes High impedance mode at reset
STBY
: State of port when STANDBY mode.
“O/L” = Output port and “L”
“I”
= Input port
Stop
: State of port when Stop mode.
“O/L” = Output port and “L”
“I”
= Input port
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