Denon AVR-2808, Service Manual

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AVR-2808
M3062LFGPGP (DI: IC951)
M3062LFGPGP Terminal Function
Pin Pin Name Symbol I/O Type Det
Op
(Int.)
Op
(Ext.)
Res Function
1 P94/TB4 VPLD DATA O C - - - Z Video PLD control pin
2 P93/TB3 DIR CE O C - - - Z DIR control pin (LC89057W-VF4A)
3 P92/SOUT3 DIR DIN O C - - - Z DIR control pin (LC89057W-VF4A)
4 P91/SIN3 DIR DOUT I - Lv - Eu Z DIR control pin (LC89057W-VF4A)
5 P90/CLK3 DIR CLK O C - - - Z DIR control pin (LC89057W-VF4A)
6 BYTE BYTE - - - - - - GND (Ext. data bus bit width switching, 16bit: L)
7 CNVCS CNVSS - - - - - - Single-chip/Micro-processor mode switching (Normal single-chip: L,
Rewrite boot program start:H input set)
8 P87 VERST O C - - Eu Z Video encoder reset (ADV7320)
9 P86 VDRST O C - - Eu Z Video encoder reset (ADV7430)
10 RESET SUBRESET I - Lv - Eu L Reset input
11 XOUT X1 O - - - - - Oscillator connection
12 VSS VSS - - - - - - GND
13 XIN X2 I - - - - - Oscillator connection
14 VCC VCC - - - - - - +3.3V
15 P85/NMI NMI I - - - - - Not used (Fixed to H)
16 P84/INT2 CEC-I I - - - - Z CEC-D signal input pin (reserve)
17 P83/INT1 ACKSIMO I - E ↓ &L - Ed Z MAIN-SUB μcom comm. Control input pin
18 P82/INT0 SUB BDOWN I - E ↓ &L Eu Z Power down detect (Power down : L)
19 P81 IP RST O C - - - Z IP CONV (FLI2310) reset
20 P80 Z2SSIG.DET I - - - Ed Z
21 P77 DZ3C O - - - - Z PLD rewrite control (JTAG)
22 P76 PLD̲CS̲MAIN/TMS O C - - - Z MAIN FPGA (PLD) control pin/PLD rewrite control (JTAG)
23 P75 PLD̲DATA/TDI O C - - - Z MAIN FPGA (PLD) control pin/PLD rewrite control (JTAG)
24 P74 MPLDCLK O C - - - Z MAIN FPGA (PLD) control pin/PLD rewrite control (JTAG)
25 P73/CTS2 VIDEO̲POWER O C - - - Z VIDEO POWER control output (H : ON)