Related reference
Mode-specific guidelines
Four memory channels are allocated to each processor. The allowable configurations depend on the memory mode selected.
NOTE:
You can mix x4 and x8 DRAM based DIMMs to support RAS features. However, all guidelines for specific RAS
features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC) in memory optimized
(independent channel) mode. x8 DRAM based DIMMs need Advanced ECC mode to gain SDDC.
Advanced Error Correction Code (lockstep)
Advanced Error Correction Code (ECC) mode extends SDDC from x4 DRAM based DIMMs to both x4 and x8 DRAMs. This protects
against single DRAM chip failures during normal operation.
The installation guidelines for memory modules are as follows:
•
Memory modules must be identical in size, speed, and technology.
•
DIMMs installed in memory sockets with white release levers must be identical and the same rule applies for sockets with black release
levers. This ensures that identical DIMMs are installed in matched pair —for example, A1 with A2, A3 with A4, A5 with A6, and so on.
Memory optimized (independent channel) mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any
specific slot population requirements.
Memory sparing
NOTE:
To use memory sparing, this feature must be enabled in System Setup.
In this mode, one rank per channel is reserved as a spare. If persistent correctable errors are detected on a rank, the data from this rank is
copied to the spare rank, and the failed rank is disabled.
With memory sparing enabled, the system memory available to the operating system is reduced by one rank per channel. For example, in a
dual-processor configuration with sixteen 4 GB single-rank memory modules, the available system memory is: 3/4 (ranks/channel) × 16
(memory modules) × 4 GB = 48 GB, and not 16 (memory modules) × 4 GB = 64 GB.
NOTE:
Memory sparing does not offer protection against a multi-bit uncorrectable error.
NOTE:
Both Advanced ECC/Lockstep and Optimizer modes support memory sparing.
Related reference
Sample memory configurations
The following table shows sample memory configurations for one processor configuration that follow the appropriate memory guidelines.
NOTE:
1R and 2R in the following tables indicate single- and dual-rank DIMMs respectively.
Table 28. Memory configurations—single processor
System
Capacity (in
GB)
DIMM Size
(in GB)
Number of
DIMMs
DIMM Rank,
Organization, and
Frequency
DIMM Slot Population
8
8
1
1R, x8, 2400 MT/s
A1
16
8
2
1R, x8, 2400 MT/s
A1, A2
16
1
2R, x8, 2400 MT/s
A1
60
Installing and removing system components
