DDC BU-67121W, Hardware Manual

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C O N N E C T O R S A N D P I N O U T S
Data Device Corporation BU-67121W Manual
www.ddc-web.com Rev B – 6/16
47
Table 7. J1 15-Pin D-Sub Connector Pinout
J1 15-Pin D-Sub 1553 Mini PCI-e Site A 429 Mini PCI-e Site A
1 CHASSIS GND CH1A_717/429_RX_TX_IO
2 CH1_TX_INH CH1B_717/429_RX_TX_IO
3 CH1_BC_DISABLE CH2A_717/429_RX_TX_IO
4 CH1_EXT_TRIG_SS_FLAG# CH2B_717/429_RX_TX_IO
5 IRIG_DIG CH3A_429_RX_TX_IO
6 CH2_TX_INH CH3B_429_RX_TX_IO
7 CH2_BC_DISABLE CH4A_429_RX_TX_IO
8 CH2_EXT_TRIG_SS_FLAG#
CH4B_429_RX_TX_IO
9 DGND DGND
10 NC
CH5A_429_RX_ONLY_IO
11 NC CH5B_429_RX_ONLY_IO
12 NC
CH6A_429_RX_ONLY_IO
13 NC CH6B_429_RX_ONLY_IO
14 NC DIGITAL_IRIG_IN
15 NC SPARE (CHASSIS GND)
8.3.2 AIC J2 Connector
Figure 39. AIC J2 9-Pin D-Sub Connector
When populating the Mini PCI-e site A with DDC cards, the following table shows
which signals come out of each pin on the connector.
Table 8. J2 9-Pin D-Sub Connector Pinout
J2 9-Pin D-Sub 1553 Mini PCI-e Site A 429 Mini PCI-e Site A
1 MIL_STD_1553_A1-
D_IO_2
2 MIL_STD_
D_IO_1