Datron 1061 Service Handbook Download Page 96

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Summary of Contents for 1061

Page 1: ...ol Date 05 1 5 2000 Mfg DATRON Model Series 1062 1061A 1061 Document T pe Calibration Servicing Handbook Note Digital Multimeter s 0 0 13 0 Q a li CALIBRATON AND SERVICING HANDBOOK 10B1A 10B1 I N S C R U M I digital multimeter ...

Page 2: ...the User s Handbook 850045 Issue For any assistance contact your nearest Datron Sales and Service center Addresses can be found at the back of this handbook Due to our policy of continuously updating our products this handbook may contain minor differences in specification components and circuit design to the instrument actually supplied Amendment sheets precisely matched to your instrument serial...

Page 3: ...AL DESCRIPTION 13 2 1 GENERAL 13 2 2 FRONT PANEL 13 2 3 REAR PANEL 13 2 4 EXTERNAL CONSTRUCTION 13 2 5 INTERNAL CONSTRUCTION 13 3 TECHNICAL DESCRIPTION 15 3 1 INTRODUCTION 15 3 2 ANALOG ASSEMBLY 15 3 2 1 Analog Interface 15 3 2 1 1 Introduction 15 3 2 1 2 Power On 15 3 2 1 3 General Interface Update Sequence 17 3 2 1 4 Test 17 3 2 2 DC Isolator Section 17 3 2 2 1 Preamplifier Scaling 17 3 2 2 2 Pr...

Page 4: ...SSEMBLY 30 3 4 1 Low Drift Voltage Follower 30 3 4 2 Constant Current Source 30 3 4 3 Test 31 3 5 CURRENT ASSEMBLY 31 3 5 1 Current Measurements 32 3 5 2 Test 32 3 6 REAR INPUT RATIO INPUT 32 3 6 1 General 32 3 6 2 Front Panel Rear Panel Input 32 3 6 3 Ratio 32 3 6 4 Test 33 3 7 ANALOG OUTPUT 33 3 7 1 General 33 3 7 2 Description 33 3 8 DIGITAL ASSEMBLY 33 3 8 1 Processor and Memory 33 3 8 1 1 Sof...

Page 5: ...2 1 RAM ROM Circuit 3 12 2 Interface Circuit 3 13 REAR POWER SUPPLY PCB ASSEMBLY 48 3 13 1 General 3 13 2 180V Supply 48 3 13 3 5V Supply 48 3 13 4 15V Supply 48 3 14 SELF TEST SEQUENCE 48 4 INTERNAL ADJUSTMENT PROCEDURES 51 4 1 ALTERATION OF LINE VOLTAGE AND FREQUENCY 51 4 1 1 Changing Line Voltage 51 4 1 2 Changing Line Frequency 51 4 2 BATTERY REPLACEMENT 51 4 3 POST REPAIR PROCEDURES 51 4 3 1 ...

Page 6: ... 84 ILLUSTRATIONS AND TABLES Figure Title Page 1 1 Zero Resistance Source Connections 4 2 1 Exploded View of Instrument 14 3 1 Printed Circuit Boards Block Diagram 15 3 2 Power On Options Fitted Test 16 3 3 Analog Interface Sequence Power Up 16 3 4 Analog Interface Data Line Timing Diagram Power Up 16 3 5 Analog Interface Sequence Ohms Select 17 3 6 General Form of Analog Interface Update Timing D...

Page 7: ...d 3 32 Simplified Diagram of Current Assembly oo 3 33 Simplified Block Diagram of Digital Assembly oo 3 34 Job Scheduler 3 35 Two Phase Clock Generation 3 36 Timing Diagram of Stretched Two Phase Clock Oft 3 37 Simplified Diagram of Memory Circuits oo 3 38 Start Up and Non Volatile RAM Protection OR 3 39 CMOS Address Decoding OR 3 40 Simplified Diagram of Digital Section of A D Converter iq 3 41 F...

Page 8: ... to remain at earth throughout and let the calibration source float If a Remote Guard connection is necessary then examples are shown in the Operating Manual 1 1 3 The AUTOCAL Process 1 1 3 1 General The Datron AUTOCAL process means that complete calibration of AC DC Ohms and Current on every range can be carried out from the instruments own front panel In the process an internal non volatile memo...

Page 9: ...ration is required for each polarity of input The two Zero calibrat ions are included to overcome a possible zero difference with the polarity setting of the DC calibration source If the DVM Reading After Calibration is not in accordance with the table repeat operations of the same CALIBRATE key are permissible Where no tolerance is shown in this column only the exact reading quoted with an occasi...

Page 10: ...o 0 000mV DC 1 Zero 0 000mV 1 digit Wait for the reading to stabilize before operating Zero 12 IV Positive Full Range 1 00 000mV DC 1 Gain 100 000V 1 digit 13 IV Range Zero O OOOmV DC 1 Zero 0 000mV 1 digit Wait for the reading to stabilize before operating Zero 14 1V Negative Full Range 1 00 000mV DC 1 Gain 100 000V 1 digit 15 100V Range Zero O OOOV DC 100 Zero iO OOOV 16 100V Positive Full Range...

Page 11: ...ed with an occasional least significant digit showing is to be expected 1 3 2 Zero Resistance Source For accurate Zero calibration on Ohms it is ESSENTIAL that a correctly connected zero source is used Two arrangements are necessary as shown in Fig 1 1 it can be seen that 4 wire J2 selection is recommended on all ranges 1 3 3 Equipment Required A set of resistance standards from lOfil to lOMO in d...

Page 12: ...zero kl2 4 wire 10 Zero 0 0000kl2 8 lOkfi Full Range 10kl2 1 Standard Resistor kl2 4 wire 10 Gain 10 0000kl2 9 100kJ2 Range Zero 4 wire zero kl2 4 wire 100 Zero 0 000kl2 10 100kS2 Full Range 100kl2 1 Standard Resistor kl2 4 wire 100 Gain 100 000kl2 11 1000kS2 Range Zero 4 wire zero kl2 4 wire 1000 Input Filter 2 Zero 0 00kl2 0 000kl2 12 1000k 2 Full Range 1000kl2 1 Standard Resistor kl2 4 wire 100...

Page 13: ... table repeat operation of the same CALIBRATE key is permissible to improve the readings This will be necessary with the AcHf key 1 4 2 Equipment Required A copper shorting link and an AC calibration source e g Datron 4200 Autocal AC Standard 1 4 3 Checking Accuracy after AUTOCAL To check the accuracy after AUTOCAL the Speci fication Verification section of the Operating Handbook will be useful It...

Page 14: ... 10 0000V 5 digits 9 IV Full Range LF IV rms 500Hz AC 1 Input filter Gain 1 00000V 1 digit 10 IV Full Range HF IV rms 30 kHz AC 1 Input filter AcHf 1 00000V 5 digits 11 IV Full Range LF IV rms 500 Hz AC 1 Input filter Gain 1 00 000mV 2 digits 12 IV Full Range HF IV rms 30 kHz AC 1 Input filter AcHf 1 0O OOOmV 5 digits 13 100V Full Range LF 1 0OV rms 500 Hz AC 100 Input filter Gain 100 000V 1 digit...

Page 15: ... key Note To reduce the effect of noise at low input levels AC zero calibration is carried out at 0 1 Range and for lOOmV Range zero steps 1 2 of the table Guard is connected to Lo using a copper shorting link 1 4 5 Equipment Required A copper shorting link and an AC calibration source e g Datron 4200 Autocal AC Standard 1 4 6 Checking Accuracy after AUTOCAL To check the accuracy after AUTOCAL the...

Page 16: ...00V rms 500Hz 500V rms 20kHz DVM Setting AC DC 1 AC 10 AC 100 AC 1000 AC 10 AC 10 AC 100 AC 100 CALIBRATE Key Zero Check only Zero Zero Gain AcHf Gain AcHf Gain Gain AcHf AC 1000 KEYBOARD 500V Gain DVM Reading After Calibration O IOOmV 10 digits C100 digits 0 00100V 1 digit 0 010 0V 1 digit 0 100V 1 digit 1 00V 1 digit 10 000 0V 1 digit 10 000 0V 10 digits 1 000 00V 1 digit 1 000 00V 10 digits 1 0...

Page 17: ...A Autocal Standard with Option 20 1 5 3 Checking Accuracy after AUTOCAL To check the accuracy after AUTOCAL the Speci fication Verification section of the Operating Handbook will be useful It provides tables for quick reference of accuracy on all ranges and functions in displayed digits DC CURRENT CALIBRATION TABLE Step Calibration Operation Calibration Source Output DVM Setting CALIBRATE Key DVM ...

Page 18: ...of the Operation Handbook will be useful It provides tables for quick reference of accuracy on all ranges and functions in displayed digits AC CURRENT CALIBRATION TABLE Calibration Operation Calibration Source Output DVM Setting CALIBRATE Key DVM Reading After Calibration Remarks DC coupled AC Zero No connections to DVM input terminals I DC AC 1 Zero O OOOmA 5 digits Do not select Input filter Hi ...

Page 19: ...es a higher percentage calibration error The KEYBOARD method operates for both the Gain and AcHf calibration operations An example using KEYBOARD to calibrate directly against a Standard Cell is shown in the table below 1 7 2 KEYBOARD with Negative Inputs If the KEYBOARD method is used on DC Voltage calibration with Negative polarity sources it is important NOT to enter a negative sign with the ke...

Page 20: ...terrupts from interface 7 check status byte S obtained by service routine prompt operator to apply calibration source on com pleting zero cal program gain cal trigger program to Internal Trigger Disable Cal on completion of gain cal program DVM to local state SRQ service routine to read status byte CALIBRATION EXAMPLE USING THE BUS Step Calibration Operation Calibration Source DVM Setting Bus Cont...

Page 21: ...foam covers The bottom cover is fitted with the tilt stand rubber feet and instruction card Earth screening of the covers and guarding is provided by aluminium plates heat staked to the inside of the covers with electrical connections made by spring contacts 2 5 INTERNAL CONSTRUCTION An internal chassis is constructed from five printed circuit boards held together by connectors at each corner and ...

Page 22: ...ION EARTH SCREEN DISPLAY DRIVER ASSEMBLY CURRENT ASSEMBLY OPTION rii ACASSEMBLY OPTION 10 See Note 1 OHMS ASSEMBLY OPTION OUTER GUARD SCREEN BOTTOM COVER ASSEMBLY R H CENTRE GUARD SCREEN FRONT PANEL AND OVERLAY TERMINAL SUPPORT PLATE FRONT PCB ASSEMBLY FRONT GUARD SCREEN L H PCB ASSEMBLY L H CENTRE GUARD SCREEN CENTRE PCB ASSEMBLY ANALOG ASSEMBLY TOP COVER ASSEMBLY FIG 2 1 EXPLODED VIEW OF INSTRUM...

Page 23: ...and the D A converter set up conditions A line is also provided to instruct the micro processor which options are present and if the AC assembly is measuring a signal above 5kHz 3 2 1 2 Power On At power on the A D converter is placed into the RESET condition See Section 3 2 3 8 The analog cir cuitry is then interrogated to discern which options if any are fitted Finally the analog circuitry is pl...

Page 24: ...of M19 is set low if the option is fitted causing the COND VAL to be set high Note ID and lA lines logic 1 1 5 volts logic 0 5 0 volts AD lines logic 1 0 volts logic 0 5 15 volts The next step in the power up sequence as far as the analog circuits are concerned is to be placed into the DC 1000V range See Fig 3 3 Flowchart Firstly all assemblies are deselected by placing logic 1 s on all the ID lin...

Page 25: ...ent Compensation AC Volts AC Assembly Frequency Compensation AC H DC Volts AC Assembly Frequency Compensation Resistance Ohms Assembly and Analog Assembly Input Bias Current Compensation DC Current Current Assembly and Analog Assembly Input Bias Current Compensation AC Current Current Assembly and AC Assembly Frequency Compensation AC 1 DC Current Current Assembly and AC Assembly Frequency Compens...

Page 26: ..._i _ 0 O 5 O IT O A 0 3 r 0 cc yj cc FIG 3 6 GENERAL FORM OF ANALOG INTERFACE UPDATE TIMING DIAGRAM Data Messages from Digital Board ANALOG INTERFACE INPUT ATTENUATOR ACTIVE FILTER GAIN NETWORK BS lnput Amplif ier Output to A D Converter 40V L Inverter BS DC Bootstrap Common BS DC Bootstrap BS DC Bootstrap FIG 3 7 SIMPLIFIED DIAGRAM OF DC ISOLATOR ...

Page 27: ...er input can never exceed approximately 24 volts The output from the DC Isolator test point TL8 is approximately 3 16 volts To for a full range 100 000 input by the following methods See Fig 3 9 lOOmV Range Q6 and Q8 are turned on all other F E T s are turned off and RL1 energised Thus the output of the amplifier is connected to its inverting input via R108 R109 R110 R111 and Q6 an attenuator chai...

Page 28: ...high inpedance buffer which tracks the inverting input of the preamplifier The offset of M32 is adjusted so that its input is within lOO tV of the input of the preamplifier M32 thus functions as the low impedance rail BS following the input signal Selection of DC M20 3 enables the capacitive inverter driven from IVI33 to provide an unregulated i 42V TL4 and 42V TL5 supply from the 15V supply The p...

Page 29: ...st routine actuated from the front panel or remotely programmed the DC isolator is checked for correct operation The circuitry is placed into the 0 1V range as described in 3 2 1 3 except that relay RL1 is not energized i e the I 100 attenuator is across the input amplifier Filter is selected and F E T Q5 closed via M20 5 causing a small signal to be injected into the feedback path of the input am...

Page 30: ...y Reset Switch Control Polarity Sense From Digital Assembly FIG 3 12 SIMPLIFIED DIAGRAM OF ANALOG SECTION OF A D CONVERTER Multiplexer M35I Control Lines Ref 1 Sig Output TPB Ref 2 Ref 1 Integrator p Output 2nd Null p Detector I Output I 1 Null Final Nul FIG 3 13 TIMING DIAGRAM FOR ANALOG SECTION OF A D CONVERTER Positive Signal ...

Page 31: ...y as the signal temperature coefficient followed by opposite polarity reference and reference r 16 signals to the buffer and integrator The multiplexer is then placed in a reset condition ready for the next measurement The resistor chains R42 R43 and R89 R90 are binary cycle Fig 3 14 gives the multiplexer control line sequence weighted values allowing the set up of the exact nominal for both posit...

Page 32: ...tained constant whatever the input signal 3 2 3 5 Integrator The basic Integrator comprises R6 R7 and C9 with hybrid amplifier Q35 and M25 See Fig 3 17 Low noise FET pair Q35 also has low gate leakage which maintains the effectiveness of sample and hold components R34 and C12 An inverted and attenuated version of the integrator output voltage is developed across R5 This is applied via R4 and CIO t...

Page 33: ...fset a small amount in a cycle of 16 steps See Fig 3 20 This offset is produced from the digital to analog converter M28 which is enabled by the level shifted AVE signal from M20 5 and clocked from M6 the C control opto isolator 3 2 3 S Reset Period At the end of a measurement cycle or in hold the circuitry is placed into a reset condition The control lines of the multiplexer M35 allows the 0 volt...

Page 34: ...26 ...

Page 35: ...l to the input of the AC assem bly If DC and AC are selected together the AC assembly becomes DC coupled by energising RL3 causing C57 the AC coupling capacitor to be by passed The signal is then fed to the switched gain inverting preamplifier whose full range output is 0 9 volts r m s A simplified diagram of this arrangement is shown in Fig 3 23 The frequency response is held flat to within 1 by ...

Page 36: ...e rectifier to provide the same output for non inverted or inverted asymmetric waveforms The output current from the RMS module passes into filter buffer Ml and is converted to a nominal 5 volts for a full range signal Q1 and Q2 switch in additional capacitors when FILTER is selected to operate down to 45Hz M2 is a voltage to current converter providing a feedback current to the RMS module proport...

Page 37: ...26 SIMPLIFIED DIAGRAM OF AC HIGH FREQUENCY COMPENSATION 3 3 5 Frequency Detection 430402 sheet 2 The signal frequency is monitored by M10 which is set so that a signal frequency greater than 5kHz causes a logic V 0 volts on M10 4 This signal indicates to the Digital Board via M18 M2 Drawing No 430328 sheet 5 which one of the two sets of specifications should be used for calculating the measurement...

Page 38: ... with the 1000 Volt range of the DC isolator The resultant impedance presented at the input terminals is a resistance of 1ML2 shunted by 150pF Relay RL2 is energized on selection of AC directly connecting the Hi terminal to the input of the AC assembly If DC and AC are selected together the AC assembly becomes DC coupled by energizing RL3 causing C77 the AC coupling capacitor to be by passed The s...

Page 39: ...ensing as shown in the simplified block diagram Fig A3 25 M13 and M14 form a summing full wave rectifier The output of precision half wave rectifier M13 is summed with the non inverted signal at the input of Ml 4 with a weighting of 2 1 This forces an accurately rectified full wave current to flow in RMS module Mil Potentiometer R62 adjusts the rectifier symmetry to provide the same output for sig...

Page 40: ...rried out at one H F frequency but since it flattens the AC amplifier response the correction is valid for all specified frequencies It should be noted that the calibration routine is iterative since the varicap is non linear A3 3 5 Frequency Detection 430552 sheet 2 The signal frequency is monitored by M10 which is set so that a signal frequency greater than 2kHz causes a logic 1 0 volts on M19 4...

Page 41: ...consider 2 wire measurement I i is linked to Hi I is linked to Lo and the unknown resistance linked between Hi and Lo with a constant current flowing from I t Hi through the unknown resistance R to Lo I The Lo terminal is maintained at OV Therefore the Hi terminal DC Isolator Input is at Iconstant above Lo As long as the error is small referred to reference 0 the DVM will read the correct resistan...

Page 42: ... there is no voltage across Rz and consequently no current in Rz Voltage follower Q10 M3 will simply pass more current into Ry from the I terminal until the selected current for the particular range flows through Rx 3 4 3 Test During the self test routine actuated from the front panel or remotely programmed the Ohms Converter is checked for correct operation The circuitry is placed into the 10kl2 ...

Page 43: ... the output of the DC Isolator to be approx imately 5 75 volts After measurement by the A D conver ter the value is compared to the stored value If the measured signal is within 6 of the stored value the test is complete 3 6 REAR INPUT RATIO INPUT Circuit Drawing No 430307 3 6 1 General The Rear Input Ratio Input assembly contains the switching circuitry to enable one of the three analog signal so...

Page 44: ... range signal from the DC Isolator or AC Converter is buffered by unity gain amplifier M2 The output is potentially divided by R7 and R8 so that 1 volt full range is presented to Ml another unity gain amplifier Potentiometer R5 is adjusted to remove any offset caused by Ml and M2 Positive temperature coefficient thermis tors R3 R4 and diodes D1 D2 protect the Analog Output circuitry from accidenta...

Page 45: ...uired to be run and cleared when completed Priority of activation is ensured by making each job exit on completion to the top of the schedule Program Modules The program memory is split into a series of functional modules each module corresponding fairly closely to a major functional area and hence to one of the jobs activated by the job scheduler the larger ones being sub divided see Drawing No 8...

Page 46: ...DAAWING No 8900 3 JIRQ 3 QATA TO DJSOl_AY 1 DRAWN JR DATE 12 1 62 DIMENSIONS IN MILLIMETRES CHECKED DATE SCALE q ts a sa APPR DATE NOT TO BE SCALED ...

Page 47: ... UPDATE CONTINUOUS AVERAGE r Q 7 i PNWY Vt CjATA value READING OR TAX OR McN CC MPuTe Ofc 107 Oni_T COTPuTE c B C 1061 ONi_y J LiMir CHECK filONLy SET OvERuOAD FLAG SET UN ITS RESOLUTION 1 SET FLAG DATA TO DISPLAY SCMP 1 TOmUJ C S CIMALT0 2PLACES 1m r CiWAL TO 1 PLACE 2n VhOlE DIMENSIONS 4m ANGULAR HO iiMLESS OTHERWISE STATED FHtT angle projection I COITPUTE ERROR I COMPUTE ERROR ON S NAL j ON S G...

Page 48: ...n as the measuring circuits are not converting an input signal the state in level 1 is moved to level 2 causing the measurement circuits to update to the new state When an A D conversion is complete data is read from the A D and the state transferred from level 2 to 3 providing information for the processing routines Additionally at this time the level 1 to level 2 transfer is repeated and the mea...

Page 49: ...ce A8 and A9 are not decoded there are images starting at 0100 0200 0300 A further 256 bytes of 8 bit wide RAM are made up from two 256 x 4 bit RAMs M19 M20 M19 and M20 are backed up by a battery to privide the non volatile Calib ration and Zero memory Three address bits A12 A14 and A15 are decoded by M33 pin 8 to enable M19 M20 but M29 pin 6 permits the memory contents to be changed only if CAL i...

Page 50: ...AND A D SECTION Fig 3 37 SIMPLIFIED DIAGRAM OF MEMORY CIRCUITS ...

Page 51: ... counter output enable 0 1 1 X X X M32 9 Analog interface address latch input enable 0 0 0 X 0 0 XKDSPO M16 7 0 0 0 X 0 1 XKDSP1 Ml 6 6 i Addresses keyboard 0 0 0 X 1 0 XKDSP2 Ml 6 5 I e d latches 0 0 0 X 1 1 XKDSP3 M16 4 0 1 0 X 0 0 XADSTA Ml 6 9 A D and interrupt status output enable 0 1 0 X 0 1 M16 10 CAL INTERVAL switch output enable 0 1 0 X 1 0 XADCTL M16 1 A D control latches input enable 0 ...

Page 52: ... the sequence completion of one stage generates the Enable for the next via M46 switches as a logic 0 state at M47 13 Timing is synchronized by Master Clock 2 positive going edges at M47 14 when M47 is enabled 3 8 3 2 Preset Procedure As part of the initialisation routine at switch on M47 used as the sequence controller is reset from M37 11 cau ng M47 2 to be logic 1 Thus the control lines A B and...

Page 53: ...D DATA READY MESSAGE AND PUT ANALOG CIRCUIT INTO RESET 1 i PROCESSOR EXTRACTS DATA FROM MAIN COUNTERS CLEAR DATA READY LINE 1 r SIGNAL A B c RESET 1 1 0 SYNC 1 1 0 SIG 1 1 1 BIAS 0 1 1 WAIT 0 1 1 1 REF 1 1 0 1 REF 2 0 0 1 END 1 1 1 FIG 3 42 A D ANALOG SEQUENCE CONTROL SIGNALS 1061 A SELECTIONS Ml 3 M 14 COUNT FUNCTION RANGE FILTER FILTER DCV All Ranges 2 101 Option 12 ACV All Ranges 61 251 DCV ACV...

Page 54: ...e REF 1 is high the primary counter of M23 is enabled pin 3 and counts the period of REF 1 REF 1 is ended when a null detector pulse is detected and latched on to M22 This causes the sequencer to step on once more from M46 3 the low to high edge from pin 4 disabling the primary counter REF 2 The REF 2 signal changes the state of the A line causing the analog section to ramp down at a slower rate r...

Page 55: ...cted to DC Isolator Lo Signals applied to the six front panel terminals are routed through to the Rear pcb to the Rear Input Ratio pcb or Rear Input pcb if Option 40 or 41 is fitted via the Signal Cable assembly Each of the terminal leads passes through its own HF choke all six inductors being wound in the same direction on the same core This Common Mode choke presents high impedance to transient ...

Page 56: ...tion is not being extracted from the keyboard encoders The data latches are divided into four sets M6 and M4 M8 and M5 Ml and Mil M9 being fully enabled from the XKD SP0 XKD SP3 lines respectively On initialisation or after a change of the instrument s selectable states the L E D data latches are updated by placing data on the CMOS Data Bus See Fig 3 46 firstly to M8 and M5 enabled from XKD SP1 an...

Page 57: ... PROCESSOR A2 ADDRESS A1 BUS A 2 IB 2B 3B 4B SELECT 1Y 2Y 3Y 4Y R V RAM DO D1 02 D3 04 D5 D6 D7 j t h h j j I I 02 XDDSP DO 01 02 03 04 05 06 07 PROCESSOR DATA BUS FIG 3 47 DISPLAY DRIVER WRITE CIRCUITRY ...

Page 58: ...to the RAM and connects the A inputs of M9 to the address lines of the RAM 3 10 2 Read Mode Discharge between adjacent display blocks is preven ted by time multiplexing and sending information to alter nate blocks A particular display block is selected by driving its anode and a particular segment by driving the segment cathode The free running clock M13 R3 R5 C16 produces a 2kHz signal Ml 3 9 to ...

Page 59: ...l Purpose Interface Adaptor GPIA M9 provides the interface between the IEEE 488 Standard Instrument Bus and the 68000 microprocessor The MPU can receive process and send messages to the interface through the GPIA The GPIA is able to automatically handle the follow ing interface protocalC Single address capability Source and acceptor handshake Talker and Listener states Service Request Parallel Pol...

Page 60: ...ra operating scratch pad memory is provided by two 256x4 bit RAMS M22 M23 Both the ROM and RAM s receive the address information with chip selection being made by decoding address lines A8 A11 with XIOBD R W and 02 3 12 2 Interface Circuit The Peripheral Interface Adapter PI A Ml pro vides the means of interfacing the BCD input output to the 6800 microprocessor The PI A is selected by decoding add...

Page 61: ...central printed circuit board is powered from the supply gener ated from the two 8 8 volt 750mA secondary windings on transformer T1 The centre tap digital common is linked directly to line ground via LK6 The output of rectifying diodes D1 and D2 is smoothed by C7 and C8 before being fed to regulator Ml This regulator is capable of 1 amp output and has foldback current limiting and thermal shut do...

Page 62: ...49 ...

Page 63: ...R UNCORRUPTED CALIBRATION STORE CHECK FOR UNCORRUPTED INPUT ZERO STORE DISPLAY PASS CANCEL TEST KEY L E D NoV IS I FITTED TEST DCI MEASUREMENT Fail 1mA RANGE The Intrument is returned to the HOLD mode with the last selected range function and filter modes selected ADD A LEGEND TO DISPLAY DISPLAY ERROR 8 WAIT UNTIL EITHER GET OR MANUAL IS INPUT OF SELF TEST ROUTINE ...

Page 64: ...ary Links should be 22 SWG TIN Cu wire with silicone rubber sleeving 4 2 BATTERY REPLACEMENT The battery should be replaced on or before the date indicated on the rear panel instrument identification label To retain the calibration memory the instrument must be powered up during replacement Therefore great care must be taken due to voltages up to 260 volts being present inside the instrument 1 Rem...

Page 65: ...7 Adjust L2 to give a stable H 05 0 03V NOTE This signal contains about 200mV peak to peak high frequency noise 13 Insert calibration key into keyswitch on the back panel and turn placing the instrument into CAL mode NOTE The display CAL legend will be lit 14 Short together pins D and E on Digital assembly NOTE All the calibration store correction factors are now reset to zero 15 Turn the calibrat...

Page 66: ...inals Select ZERO 32 Apply t 10 volts and select GAIN Repeat until display reads H 0 0000 digit 33 Apply M9 volts If the display reads within the limits t 18 9999 to t19 0001 proceed to step 35 34 Calculate E 19 displayed reading 2 Re apply HO volts and adjust R23 for a displayed reading of 10 E Repeat steps 32 34 until both readings are within the limits indicated 35 Turn rear panel keyswitch to ...

Page 67: ...ts 10 This part of the procedure must be performed with the high frequency compensation voltage at Jl ll R57 at 5V 0 2V a Select AC 100V range FILTER and apply 100V 500Hz Select GAIN Apply 100V 50kHz and adjust C62 for a display of 100 000V 20 digits b Apply 100V 100kHz note error and adjust C61 to double the displayed error in the same direct ion c Rep eat a and b until 50kHz and 100kHz displays ...

Page 68: ...v 1 078 2 937 2 954 v s X X 1 072 2 954 2 973 s X v 1 065 2 973 2 988 X v X 1 059 2 988 3 004 X X v 1 054 3 004 3 021 v X X X 1 048 3 021 3 038 X s x 1 042 3 038 3 055 X v X 1 036 3 055 3 071 X x X v 1 031 3 071 3 090 X v X X 1 025 3 090 3 110 X X v 1 018 3 110 3 128 X X v X 1 012 3 128 3 147 X X X v 1 006 3 147 3 167 X X X 1 000 Increase in TLH voltage when links are cut FIG 4 3 OPTION 12 AC ASSE...

Page 69: ...Factor 21 Apply 1VRMS ve 5 1 Crest Factor signal Adjust R61 crest factor for a display reading of 1 00000V 30 digits 22 Apply 1VRMS ve 5 1 Crest Factor signal Check that display reading is 1 OOOOOV 30 digits 23 Apply IV 500Hz and perform GAIN Autocal Repeat 21 22 and 23 until crest factor readings are within limits Linearity Checks 24 Select IV range AC DC Apply IV DC and perform GAIN Autocal 25 A...

Page 70: ...000V 0 7 1000V 0 m 0 DC Coupled AC Voltage Range ADO ADI AD2 1 lOOmV 0 1 1 2 lOOmV 0 1 1 3 IV 0 1 1 4 10V 0 1 0 F 100V 0 1 0 6 1000V 0 1 0 7 1000V 0 1 0 1 E T PATTERNS DC isolator AD4 AD6 AD7 0 0 1 1 X 0 0 1 1 X 0 1 1 1 X 0 1 0 1 X 0 1 1 0 X 0 1 0 X 0 1 0 0 X AC assembly AD3 AD4 AD5 AD6 AD7 0 0 0 1 X j 0 0 0 1 X 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 AC assembly AD3 AD4 ADS ADS AD7 0 0 0 1 X 0 0 0 ...

Page 71: ... 1 1 0 1 0 0 1 6 1A 0 0 0 0 0 1 1 X 1 1 0 0 1 0 1 7 1A 0 IB 0 0 0 1 1 X 1 1 0 0 1 0 1 9 AC Current Range AC assembly Current assembly ADO ADI AD2 AD3 AD4 ADS ADS AD7 ADO ADI AD2 AD3 AD4 ADS ADS AD7 1 lOOpA 0 0 1 0 0 0 1 X 0 1 0 0 0 1 0 X 2 100 LlA 0 0 1 0 0 0 1 X 0 1 0 0 0 1 0 X 3 1mA 0 0 1 0 0 0 1 X 1 0 0 0 0 1 0 X 4 10mA 0 0 1 0 0 0 1 X 1 1 1 0 0 1 0 X 5 100mA 0 0 1 0 0 0 1 X 1 1 0 1 0 1 0 X S 1...

Page 72: ...59 TEST ...

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Page 166: ... WITH BS 308 DRAWN CHECK B DIMENSIONS IN TOtIRANCES ANCUU OrtfNVONS DtCnAL TO J JAC 5 OtC L TO I flACES 1 010 fM CTVONAL MeraiC CMMENSONi OEOMAlTO aACESi 1 CSfCIMAJ TO 1 fVACE VWlOU DtMENiONi r UNaU OTHERWISE SIAIEO MATERIAL MILLIMETRES TRACED APPROVED FINISH SCALE DAT DATE NOT TO BE SCALED ...

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Page 169: ...THIRD ANGLE PROJECTION DRAWN IN ACCORDANCE WITH BS 308 o 0 0 ...

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Page 172: ...THIRD ANGLE PROJECTION DRAWN IN ACCORDANCE WITH BS 308 C V i K b ...

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Page 174: ...ELECTRONICS LTD NORVVk m MPu 4 memory circuit A1 430329 ...

Page 175: ...E PROJECTION DRAWN IN ACCORDANCE WTHH BS 308 ALL BURRS TO BE REMOVED 74L8I56 o I BiA CONTINUeb ON ShCET I i OKXM 6 riACii MlACtKXAl HHHlC OMlNiONi datrm ELECTRONICS LTD lO l CMOS ADDRESS DECODE I O CIRCUIT 430329 ...

Page 176: ...datron electronics ltd Norwich A1 1061 A O CONVERTLR OMWiNG No 430329 3 C ...

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Page 190: ...ACli oel AS PARTS LIST datrm ELECTRONICS LTD NORWICH issT lECOaSw Y S 7 X j pATO l iST Cyt66S I fCO OYI aY3 WSpC Ctl J tLS wic ITT S UU w WA4 VA ICll WAY TOA loiiwtY AA4T i J W IQ TO n I leainii BJ S IHTV r m ICO r rriBwPAaAUJl iwm Ai2 jvACUfc CHAM tf T P ECO IOB9 C S C S IbA b l CYtwB To i curt w h C7I Ai O AbCCb WAS 60S0S7 It CHAHOe To RSoj LU lISS on Aooco M lACRO I TP 5 lyO SOCA T OK t CCO 139...

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Page 192: ...M41 RJO C4 V 220C 6 R OcfF Qy L J4 An K8 DiMiNSIONS IN IOl N Si NCUL INCH D nlNS 0Nt wc i o j cn i otcn i lo nACd 010 MAtEflAL datrm ELECTRONICS LTD NORWICH OMWiNC Si2 A1 1 iCM t NOT TOBf SCAlEO HIIKiC oinlNSONl OtC U TO 1 flACii linin OiCrlAi TO 1 WwOli OirIfNMOHS t WKiTSiOtWKWiil iTAffO flNI H T1TL lOlol I07I AC RMS SLCTtOH OAAWING No 430402 2 c i ...

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Page 195: ...P Beao w te Amo iusCEt ir iuto l WAV fcOCJCCT OMC EWO IM1 MOI TMt 0 O 4TP EAlOIMTO MOl S IIIOOiQOOOBil Rkvm xkt om jo tier Plvis A6 SHO V W BV AKCrW J 6fr J CkCvb C TiM lU l2 K4 lOKtWW aY thlAt Sb a LA 4oJV PlAiYiC PL06 epAi r J JO 60L00 IvlSEPrcO lUTD v n SS y U MOflfliOIOtW 7 OR GlOi D Cc P PlAia ft CT MO toao57 CAJC 0 4 Eacp 6a40 oa wiees 3 oPf 0 4 U e p BKCaa U WiEt Patt uo 5iOi a i SfXiP 3 Pe...

Page 196: ...P Beao w te Amo iusCEt ir iuto l WAV fcOCJCCT OMC EWO IM1 MOI TMt 0 O 4TP EAlOIMTO MOl S IIIOOiQOOOBil Rkvm xkt om jo tier Plvis A6 SHO V W BV AKCrW J 6fr J CkCvb C TiM lU l2 K4 lOKtWW aY thlAt Sb a LA 4oJV PlAiYiC PL06 epAi r J JO 60L00 IvlSEPrcO lUTD v n SS y U MOflfliOIOtW 7 OR GlOi D Cc P PlAia ft CT MO toao57 CAJC 0 4 Eacp 6a40 oa wiees 3 oPf 0 4 U e p BKCaa U WiEt Patt uo 5iOi a i SfXiP 3 Pe...

Page 197: ...P Beao w te Amo iusCEt ir iuto l WAV fcOCJCCT OMC EWO IM1 MOI TMt 0 O 4TP EAlOIMTO MOl S IIIOOiQOOOBil Rkvm xkt om jo tier Plvis A6 SHO V W BV AKCrW J 6fr J CkCvb C TiM lU l2 K4 lOKtWW aY thlAt Sb a LA 4oJV PlAiYiC PL06 epAi r J JO 60L00 IvlSEPrcO lUTD v n SS y U MOflfliOIOtW 7 OR GlOi D Cc P PlAia ft CT MO toao57 CAJC 0 4 Eacp 6a40 oa wiees 3 oPf 0 4 U e p BKCaa U WiEt Patt uo 5iOi a i SfXiP 3 Pe...

Page 198: ...LD CpiMS JEPMINAI 90SO 7 FITTED AS SHOWN BRASS ar iF 220 LONG 6S0I07 N B S1SIP SHOULD Bt SOLOEFRD AS CLOSE AS POSSIBLE TO tf T HAND 5i6l OF ccope lAND AS SHOWN _ SMALL CIOVERIEAF TERMINAL 630001 5 Ml AU WIRES TO E lAT PiNS 7 0 2 RTfE INSULATED WHIU S40008 View Showing g LAT PIN M S FROM lO LEIUCIH Rl2 pin I 5010E PIN 1 25 RL2 Pin R12 PINB SLR Pint JS PIN 1 i 0 BLR PlHPO Rl PIN 9 40 RLS Pin I seiet...

Page 199: ...Ml 1 OftAWN DATE 7 7 U CHECKCO L O Cr DATE II 1 ti DATE _ iS T St DIMENSIONS IN I HLIIMETHE5 SCALt oiC UAi roTPiACft OCCIMAt TO 1 FLACI 1 WHOLE DIMENSIONS A MOTE I INCREASE C7J TO REDUCE READING AT MMi ON IV AND OV RANGES 2 INCREASE C47 TO REOUCI READING AT IWMt ON lOOmV RANGE ...

Page 200: ...PRECISION HALF WAVE RECTIFIER CSS 4p7P K9 c LOG AMPLIFIER 1061 62 AC option is ...

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Page 202: ... fcxt 3 A6t 3HT I f COMMOH 5CHAU CO MOM AwAlOGUt OmMOH 1 1 r _ i j 1 1 l w INo fttt04C IS tlSV liV DIMENSIONS lA MIUIMETBE5 _ SCALE tQUAAWCIS DECIMAL TO LACCS IMM DECIMAL TO I LACI WMOll O MINSIONS j 4 IO g2 AC RANOIM opriow IZ ...

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Datron 1061, Service Handbook

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