Datalogic DLR-TL001, Product Reference Manual, Page: 19 / 36

Register Description
Product Reference Guide 15
manual interface. Once stopped, the logging activity can be restarted only
after the tag has been reset using the RST bit. Default value is 0.
3 - DE (RW) - Delay_Enable bit: It is used to enable(1)/disable(0) the usage of
the SAMPLING_DELAY register. If enabled, the first sample's acquisition is
done SAMPLING_DELAY second after the start of the logging activity. Default
value is 0.
4 - RFSL (RW) - RF_Sensitivity_Level: register used to set the sensitivity level
of radio frequency front-end. Three levels can be set : 3 = max, 1 = min.
The default value is 1.
5 - MKTE (RW) - Mean_Kinetic_Enable bit: if 1 enables MKT calculation.
Default value is 0.
6 - ARRE (RW) - Arrhenius_Enable bit: if 1 enables the calculation of the
remaining Shelf Life (SHL_TIME) of the product using the Arrhenius equation
with linear approximation. Default value is 0.
11 - SD (RW) - Stop_Disable bit: when 1, the DLR-TL001 button cannot be
used to stop the logging activity. Default value is 0.
8 to 10 & 12 to 15 Bits are RFU (RW) bits (Reserved for Future Use)
SAMPLING_DELAY Register (RW)
Register Address Op. Default
SAMPLING_DELAY 0x0B RW 0x0E10
Sampling_Delay register defines the delay, in seconds, of the first acquisi-
tion after the start of the logging activity. Register value range is 0 to 65535;
default value is 3600 (seconds) corresponding to 1 hour delay. The sampling
delay is activated if the corresponding bit on the CONTROL register (DE) is
enabled.
INIT_DATE Register (RW - 2 words)
Register Address Op. Default
INIT_DATE_L 0x0C RW 0x0000
INIT_DATE_H 0x0D RW 0x0000
The Init Date register is used to keep track of time and it is expressed in
Unix time format. Default register's value is 0 that corresponds to midnight
(UTC) January, 1 1970. If date value is 0, the internal timer is not active.
When this register is set to a non-zero value the internal 32 bit register
timer starts. The INIT_DATE register MUST be set AFTER the RESET operation
on the tag. INIT_DATE_L must be written before INIT_DATE_H. The INIT_-
DATE register is set to 0 after a reset operation.
ETA Register (RW - 2 words)
Register Address Op. Default
ETA_L 0x0E RW 0x0000
ETA_H 0x0F RW 0x0000
The Estimated Time of Arrival register (expressed in seconds) defines the
maximum time, computed from shipping date, required to arrive at destina-