Data Translation DT9850 Series, User Manual, Page: 92 / 104

Appendix A
92
DAC_Sync Trigger Specifications
Table 29 lists the specifications for the DAC_Sync trigger signal.
Table 29: DAC_Sync Trigger Specification
Feature Specifications
Power on and reset state Input
Termination Internal 100 k
Ω
pull-down
Software-selectable direction
Input
a
:
Output
b
:
a. When you configure the trigger source for the module as external, the DAC_Sync signal is configured as
an input. When a low-to-high transition is detected on the DAC_Sync pin, the module simultaneously
updates its analog output channels.
b. When you configure the trigger source for the module as software (the default configuration), the
DAC_Sync signal is configured as an output. When you start an operation (using a software command),
the module outputs a signal on the DAC_Sync pin.
Receives DAC_Sync signal from external source
Outputs internal DAC_Sync signal
Clock pulse width
Input:
Output: 1
μ
s minimum
5
μ
s minimum
Input leakage current ±1.0
μ
A typical
Input high voltage 4.0 V minimum, 5.5 V absolute maximum
Input low voltage 1.0 V minimum, –0.5 V absolute minimum
Output high voltage
c
IOH = –2.5 mA:
No load:
c. DAC_Sync is a Schmitt trigger input is over-current protected with a 200
Ω
series resistor.
3.3 V minimum
3.8 V minimum
Output low voltage
IOH = 2.5 mA:
No load: 1.1 V maximum
0.6 V maximum