dCS Scarlatti DAC
User Manual
Software Issue 1.2x
August 2011
Flename: Scarlatti DAC Manual v1_2x.docx
Page 16
English
version
R
EAR
P
ANEL
ANALOGUE OUTPUTS
LEFT
RIGHT
RIGHT
LEFT
AES 1
AES 2
RCA 1
RCA 2
SPDIF
DIGITAL INPUTS
TOSLINK
CH 1
CH 2
BNC
IN
OUT
DSD/SDIF
WCLK
1394
SUC
50/60 Hz, 50W
FUSE
T 500mA L
~
K
L
M
N
O
P
R
S
T
U
Q
V W X
Figure 5 – Rear panel
Analogue Outputs
The unit features separately buffered
Balanced Outputs
(K) on XLR connectors and
Unbalanced
Outputs
(L) on RCA connectors. The
Balanced Outputs
should be connected to true balanced inputs
only. If your preamplifier / power amplifier has unbalanced inputs (even if the inputs are on XLR
connectors), please use the
Unbalanced Outputs
instead.
AES Digital Inputs
The
AES1
and
AES2
inputs (M) can be used individually at sample rates up to 192kS/s.
If the
Dual AES
menu page is set to
On
or
Auto
, they can be used together as a
Dual AES
pair at
88.2, 96, 176.4 or 192kS/s. For Dual AES mode to work correctly, the source must actually generate
Dual AES data, not just single AES on 2 connectors!
SPDIF Digital Inputs
The unit features 3 co-ax SPDIF inputs, labelled
RCA1
,
RCA2
(N) and
BNC
(P), as well as an optical
SPDIF input on a
Toslink
connector (O). Pull out the dust cover before using the
Toslink
input. These
inputs will accept sample rates up to 192kS/s, but note that operation of the
Toslink
input is not
guaranteed above 96kS/s.
DSD/SDIF
Digital Interface
The
DSD/SDIF
interface will accept either SDIF-2 PCM data at sample rates up to 96kS/s, or SDIF-2
DSD data. The unit automatically detects the data format and sets the correct mode. The interface
consists of two data inputs labelled
CH1
and
CH2
(Q). Operation in SDIF mode requires that a word
clock from the source is connected to the
WCLK In
connector (R).
