PCIe-DIO02 User‟s Manual
5
2. PCIe-DIO02 Block Diagram
In the case of PCIe-DIO02, as shown in [Figure 2-1], it has 128 IO ports and is configured to
interface with the outside. (Input/Output can be selected and used in the program)
It is possible to select Read / Write in 8 groups of 16 bits.
-
- I/O level is compatible with Input CMOS / TTL level / Output is output with CMOS level.
PCI Target
PCI Express
BUS
Local Bus
Address
Data(Mem,I/O)
External
Interface
IO Decoder
To each IO
Module
PCIe-DIO02 INTERNAL BLOCK
MEM Decoder
BUS Mux
DIO 128bit
Input / Output
[Figure 2-1. PCIe-DIO02 Internal Block Diagram]
GENERAL DESCRIPTION
PCI Express x1
128bit general purpose I/O, Direction control grouped by 16bit.
Average data rate is 30Mb data to, 8Mb data from the board without DMA
Very flexible to upgrade because FPGA.
Compact PCB
