CP-650 Service Manual
DTV R&D Europe
40
The SECAM decoder contains an auto-calibrating PLL demodulator which has two references,
viz: the divided reference frequency (obtained from the-Controller) which is used to tune the PLL
to the desired free-running frequency and the bandgap reference to obtain the correct absolute
value of the output signal. The VCO of the PLL is calibrated during each vertical blanking period,
when the IC is in search or SECAM mode. The frequency offset of the B-Y demodulator can be
reduced by means of the SBO1/SBO0 bits in subaddress 3CH.
The base-band delay line is integrated. In devices without CVBS comb filter this delay line is also
active during NTSC to obtain a good suppression of cross colour effects. The demodulated
colour difference signals are internally supplied to the delay line. The baseband comb filter can
be switched off by means of the BPS bit (subaddress 3CH).
The subcarrier output is combined with a 3-level output switch (0 V, 2.1 V and 4.5 V). The output
level and the availability of the subcarrier signal is controlled by the CMB2-CMB0 bits.
5.2.10 RGB output circuit
In the RGB control circuit the signal is controlled on contrast, brightness and saturation. The IC
has a YUV interface so that additional picture improvement ICs can be applied. To compensate
signal delays in the external YUV path the clamp pulse in the control circuit can be shifted by
means of the CLD bit in subaddress 44H. When the YUV interface is not required some of the
pins can be used for the insertion of RGB/YPrPb signals or as additional CVBS(Y)/C input. When
the YUV interface is not used one of the pins (VOUT) is transferred to general purpose output
switch (SWO1). The IC has also a YUV interface to th edigita ldie. Via this loop digital features
like “double window” are added.
A tint control is available for the base-band U/V signals. For this reason this tint control can be
activated for all colour standards. The signals for OSD and text are internally supplied to the
control circuit. The output signal has an amplitude of about 1.2V black-to-white at nominal input
signals and nominal settings of the various controls.
To obtain an accurate biasing of the picture tube the ‘Continuous Cathode Calibration’ system
has been included in these ICs. The system is slightly adapted compared with the previous
circuits. In the new configuration the cut-off level of the picture tube is controlled with a
continuous loop whereas the correction of the amplitude of the output signals is realised by
means of a digital loop. As a consequence the current measurement can be controlled from the-
Processor. The value of the “highcurrent”intheCCCloopcanbechosenviatheSLG0 and SLG1 bits
(subaddresses 42H and 46H). The gain control in the 3 RGB channels is realised by means of 7-
bit DACs. The total gain control range is6 dB. The change in amplitude at the cathodes of the
picture tube for one LSB is about 1.1 Vp-p. The setting of the control DAC is determined by the
following registers:
The white point setting of the R, G and B channel in subaddress 20H to 22H. This register
has a resolution of 6 bits and the control range in output signal amplitude is +/-3 dB.
The cathode drive setting (CL3-CL0 in subaddress 42H). This setting is valid for all channels,
there solution is 4 bits and the control range is +/-3 dB.
The gain setting of the R, G and B channel. During switch on this register is loaded with the
preset gain setting of subaddress 23H to 25H and when necessary it will be adapted by the
CCC control loop. These registers have a resolution of 7 bits. The control of the gain setting
is illustrated in table below.
Summary of Contents for DTL-2950K
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