Daewoo DSJ-6000LN, Service Manual

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(2) Digital TV Signal Processor Circuit
The Digital TV signal entering to the Component type is processed in CXA2101A that is IC
for processing TV Video Signal, and is outputted to Analog RGB signal, then is switched
according to the RGB signal of OC.
(3) Graphic Video Signal Processor Circuit
The RGB signal selected in the Digital TV signal and PC signal is converted to two channel
48bit digital RGB signal in AD9884D which is high speed A/D converter.
(4) Image Resizing Circuit
The Digital Video signal and Digital Graphic signal that enter to PW364 from the previous
part are selected, and Image Resizing is done that converts those signals in the proper form,
then the signal is outputted in 24bit RGB signal.
(5) LVDS Output Circuit
The Video signal and Synchronizing signal (H,V sync) converted to the display format of this
appliance system is converted to LVDS signal in the TH63LVDM83A that is the LVDS
Transmitter in order to transfer to LCD Engine.
(6) System Control Circuit
This system is composed of two U-COM, and the overall system control is done in the Main
U-COM, the signal is sent that controls all IC except Engine Block, and the System Control
controls regarding image resizing, and process the key entered from the Front Key, then
controls the front-display LED.
4-4. IF Circuit & Video Circuit Structure
This IF Circuit and Video Circuit receives NTSC broadcasting signal and its corresponding
external video signal, DVD, DTV, PC signal via I set of Antenna Input in the terminal board and
6 set of external video jacks including 3 set of NTSC video jacks, then video processing is done
properly.
(1)IF Circuit
IF Signal Processing is as follows.
(1-1) NTSC TV RF Signal received from the Antenna Input of the Terminal Board enters to
TUNER (TU601).
5V, 9V : TUNER Main Power
33V : Voltage for Tuning (Vt Voltage)
(1-2) A desired broadcasting channel is selected from the TV broadcasting signal selected by
Remote Control or Switch in such a way that the data
sent from pins of SDA and SCL of -COM are routed to Pin 4 and 5 of DATA/CLK of