37
CIRCUIT DIAGRAM
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
APIOCS16#
APDD[0..15]
APDIOW#
PIDERST#
APDD2
APDD1
APDD3
APIORDY
APDMARQ
APINTRQ
APDIOR#
APDA1
APDA0
APDD5
APDD6
APDA2
APDMACK#
APCS1#
APDD0
APDD7
APDD4
IDE28
APDD[0..15]
APDD15
APDD14
APDD13
APDD12
APDD11
APDD10
APDA[0..2]
APDD9
APDD8
APCS0#
COAXOUT
S-C
Pb
Y3
Y1
Y[1..6]
VY0
Y2
ASPDIF
Y5
Y4
Y6
S-Y
CVBS
Pr
CVBSIN
Y
+3V3_STBY
+3V3_STBY
APDMARQ
[ 2,8 ]
APCS0#
[ 2,8 ]
APIORDY
[ 2,8 ]
APIOCS16#
[ 2,8 ]
APCS1#
[ 2,8 ]
APDMACK#
[ 2,8 ]
APDD[0..15] [ 2,3,8 ]
APDD[0..15]
[ 2,3,8 ]
PIDERST#
[ 2,8 ]
APINTRQ
[ 2,8 ]
APDA[0..2]
[ 2,8 ]
APDIOW#
[ 2,8 ]
APDIOR#
[ 2,8 ]
VCLK
[ 2 ]
S-CLK
[ 2 ]
AUDIO_OUT(R)
[ 6 ]
IR
[ 2 ]
Y[1..6]
[ 2 ]
VY0
[ 2 ]
VSTB
[ 2 ]
S-CS
[ 2 ]
AUDIO_IN(L)
[ 6 ]
SDATA-IN
[ 2 ]
ASPDIF
[ 2 ]
AUDIO_MUTE(H)
[ 2 ]
VDATA-IN
[ 2 ]
AUDIO_IN(R)
[ 6 ]
PSCAN(H)
[ 2 ]
VDATA-OUT
[ 2 ]
SDATA-OUT
[ 2 ]
AUDIO_OUT(L)
[ 6 ]
RESET#
[ 2 ]
IR
[ 2 ]
VCLK
[ 2 ]
VSTB
[ 2 ]
VDATA-IN
[ 2 ]
VDATA-OUT
[ 2 ]
DRAWN
DESIGNED
CHECKED
APPROVED
MODEL
FILE NAME
DATE
REVISED
REV NO.
SHEET
/
DF-Q74D2N-LS
1.1
DAEWOO ELECTRONICS Digital Video Lab.
DF-Q74D2N-LS.dsn
4 Team
MP
S.D.Park
B.Y.Choi
W.K.Ihm
S.D.Park
A4. CONNECTOR & IDE
4
11
Thursday, June 09, 2005
DRAWN
DESIGNED
CHECKED
APPROVED
MODEL
FILE NAME
DATE
REVISED
REV NO.
SHEET
/
DF-Q74D2N-LS
1.1
DAEWOO ELECTRONICS Digital Video Lab.
DF-Q74D2N-LS.dsn
4 Team
MP
S.D.Park
B.Y.Choi
W.K.Ihm
S.D.Park
A4. CONNECTOR & IDE
4
11
Thursday, June 09, 2005
DRAWN
DESIGNED
CHECKED
APPROVED
MODEL
FILE NAME
DATE
REVISED
REV NO.
SHEET
/
DF-Q74D2N-LS
1.1
DAEWOO ELECTRONICS Digital Video Lab.
DF-Q74D2N-LS.dsn
4 Team
MP
S.D.Park
B.Y.Choi
W.K.Ihm
S.D.Park
A4. CONNECTOR & IDE
4
11
Thursday, June 09, 2005
H-Impedance Mode: Rxx=150 1%
L-Impedance Mode: Rxx=75 1%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PC02
CONN
PC02
CONN
RC56
150 1%
RC56
150 1%
RC68
100
RC68
100
TP6
2
TP6
2
RC53
150 1%
RC53
150 1%
1
2
3
4
5
PC03A
CONN
PC03A
CONN
TP6
3
TP6
3
RC71
100
RC71
100
TP7
0
TP7
0
TP6
6
TP6
6
TP4
1
TP4
1
TP6
4
TP6
4
TP4
8
TP4
8
RC99
100
RC99
100
TP4
5
TP4
5
TP6
5
TP6
5
RC64
100
RC64
100
TP4
2
TP4
2
RC57
100
RC57
100
RC66
100
RC66
100
1
2
3
35
36
37
38
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
39
40
41
42
43
44
LOCK
LOCK
PC04
CONN IDE
SJP2X20-.5MM
LOCK
LOCK
PC04
CONN IDE
SJP2X20-.5MM
TP6
8
TP6
8
TP4
3
TP4
3
TP7
1
TP7
1
RC69
100
RC69
100
RC63
10K
RC63
10K
TP4
9
TP4
9
RC61
1K
RC61
1K
TP5
0
TP5
0
TP4
6
TP4
6
RC72
1K
RC72
1K
RC59
10K
RC59
10K
TP6
7
TP6
7
CC51
47nF
CC51
47nF
RC58
4.7K
RC58
4.7K
TP4
4
TP4
4
TP6
9
TP6
9
RC67
100
RC67
100
TP5
7
TP5
7
RC62
10K
RC62
10K
CF76
0.1uF/NC
CF76
0.1uF/NC
RC52
150 1%
RC52
150 1%
TP5
8
TP5
8
RC70
100
RC70
100
1
2
3
4
5
6
7
8
9
10
11
12
13
PC03
CONN
PC03
CONN
RC60
5.6k
RC60
5.6k
TP4
7
TP4
7
TP5
9
TP5
9
RC55
150 1%
RC55
150 1%
TP6
0
TP6
0
RC51
150 1%
RC51
150 1%
RC65
100
RC65
100
RC54
150 1%
RC54
150 1%
Summary of Contents for DF-4500
Page 5: ...4 TROUBLESHOOTING 2 SYSTEM CIRCUIT...
Page 6: ...5 TROUBLESHOOTING P303 Check REMOCON_IN Pin2...
Page 7: ...6 TROUBLESHOOTING B Digital Board Mpeg...
Page 28: ...27 CIRCUIT DIAGRAM 1 SERVO SYSCON SCHEMATIC DIAGRAM VE1 0 PAL RW COMBO...
Page 29: ...28 CIRCUIT DIAGRAM 2 AV IC SCHEMATIC DIAGRAM VE1 0 PAL RW COMBO...
Page 30: ...29 CIRCUIT DIAGRAM 3 Hi Fi SW IN OUT CIRCUIT SCHEMATIC DIAGRAM VE1 0 PAL RW COMBO...
Page 31: ...30 4 ADC DAC VIDEO AMP IC SCHEMATIC DIAGRAM VE1 0 PAL RW COMBO CIRCUIT DIAGRAM...
Page 32: ...31 CIRCUIT DIAGRAM 5 FRONT PART SCHEMATIC DIAGRAM VE1 0 PAL RW COMBO...
Page 33: ...32 CIRCUIT DIAGRAM 6 TUNER NICAM SCHEMATIC DIAGRAM VE1 0 PAL RW COMBO...
Page 34: ...33 CIRCUIT DIAGRAM 7 POWER SUPPLY SCHEMATIC DIAGRAM...
Page 46: ...45 PCB CIRCUIT BOARD 1 MAIN Analog board PCB...
Page 47: ...2 POWER PCB PCB CIRCUIT BOARD 46...
Page 48: ...47 PCB CIRCUIT BOARD 3 Mpeg Digital board PCB...