Daewoo AKD-80C, Service Manual

Page: 23 / 29

DAEWOO
- 22 -
PIN
No
DRAM address bus
DRAM address bus
DRAM address bus
DRAM address bus
DRAM address bus
Remaining DRAM output
Remaining DRAM output
Remaining DRAM output
DRAM write terminated. (An RZP pulse is output when there is an overflow or a shock.))
Data contact point detection complete signal:low->high:detection complete(DRAM write start)
DRAN write enable signal input: high:write enable
Pause signal input : high :pause
C2F data contact point detection start signal : low -> high:detection start
Remaining DRAM alarm output: low : memory low
C2F shock detect pause signal input : low : pause shock detection
DRAM data bus
DRAM data bus
DRAM data bus
DRAM data bus
DRAM control signal
DRAM control signal
DRAM control signal
DRAM control signal
Digital system ground. Must be connected to 0V
DRAM address bus
DRAM address bus
DRAM address bus
DRAM address bus
DRAM address bus
Digital system power supply
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
PIN NAME I/O
O
O
O
I
I
O
O
I
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
P
O
O
O
O
O
P
FUNCTION
MMC1
MMC2
MMC3
OVF
CNTOK
WOK
PAUSE
NGJ
EMPN
SHOCK
DRAM3
DRAM2
DRAM1
DRAM0
OE
WE
CAS
RAS
AD9
AD8
AD7
AD6
AD5
Vss
AD4
AD3
AD2
AD1
AD0
Vdd
90
91
92
93
94
95
96
98
99
100
97
Sub code Q output standby output
Operating mode switch: high:shock proof, low:through
DRAM empty(an RZP pulse is output when the DRAM is empty.
External reset input: low reset(all internal blocks are reinitialized)
Remaining DRAM
O
I
O
I
O
WRQ
FMT
EMPP
RES
MMC0
66
67
68
69
70
Input pin for the command input latch clock and the sub code readout clock.Schmidt
input.
Sub code Q output
I
O
CQCK
SQOUT
64
65