16
CIRCUIT OPERATIONAL DESCRIPTION
7) Output terminal
When power is turned off at power applied status, +3.3V is applied to Q822 Base terminal and Q824
MOS FET outputs MVCC(+5V) to Drain terminal. When power is turned on, low signal(0V) is
applied to Q822 Base terminal. At this time, Q824 MOS FET outputs MVCC(+5V) to Drain terminal
and +5V to Source terminal. Q823 funcionates in same process and o12M(Ever +12V) and
+12V.
2. POWER SUPPLY BLOCK DIAGRAM
NOISE
FILTER
SUNBBER
Switching
Primary
rectification
voltage
Control Drive
Circuit
Costant-voltage
Control Drive
Circuit
Starting
Part
Secondery
rectification
voltage
Picture
7 [
Output terminal
]
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Summary of Contents for DQD-6100D
Page 6: ...5 CIRCUIT DIAGRAM VIDEO All manuals and user guides at all guides com a l l g u i d e s c o m...
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Page 10: ...9 CIRCUIT DIAGRAM VCR_INT DVD All manuals and user guides at all guides com...
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Page 13: ...12 CIRCUIT DIAGRAM MPEG DECODER All manuals and user guides at all guides com...
Page 48: ...47 DISASSEMBLY All manuals and user guides at all guides com...
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